Generated reference › Outlier Reject Hold — Robotics/Perception Filters
kind: generated#block#robotics-perception-filters

Outlier Reject Hold — Robotics/Perception Filters

Robotics/Perception_Filters/Outlier_Reject_Hold · 1 input / 2 output port(s) at insert · exports to Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text

Description#

The block's own DESCRIPTION_HTML, rendered verbatim — the same text the config dialog's info panel and the library navigator show. Fix a wrong sentence in the block's .cpp (R-D9), never here.

Outlier Reject and Hold

Robotics / Perception Filters

A validation gate for one sensor channel. A sample that disagrees with the last accepted one by more than a threshold is discarded and the held value republished: with d = |u[k] − held|, the block passes y = u[k] when d ≤ Reject Threshold and otherwise repeats y = held, counting the rejections as it goes.

Once Max Consecutive Rejects samples have been rejected in a row the next one is accepted regardless, which is what lets a genuine step through. That override is not a safety net – it is the point of the block. A real change (a re-zeroed encoder, a range switch, a robot taking up a load) looks exactly like an outlier at the sample it arrives on, so a gate without one would disbelieve every sample from the step onward and hold a stale value forever.

Ports

  • u – the raw signal, a scalar [1,1]: one measurement channel. To gate several, use one block per channel – the held value and the rejection run are per signal and cannot be shared.
  • y – a scalar [1,1]: the validated signal. Bit-exact u on every accepted sample – nothing is filtered, scaled or delayed – and the last accepted value on every rejected one.
  • rejects – a scalar [1,1]: how many samples in a row have been rejected, in the range 0 … Max Consecutive Rejects. It is 0 on every accepted sample, so a nonzero value marks exactly the samples on which y is held rather than measured.

Parameters

  • Reject Threshold – a scalar > 0: how far a sample may sit from the last accepted one and still be believed. Size it above the signal's largest genuine sample-to-sample motion (its slew rate times the sample period, plus its noise) and below the size of the corruption being rejected; between those two the block does nothing useful in one direction or the other.
  • Max Consecutive Rejects – a whole number ≥ 1: how many samples in a row may be rejected before one is accepted unconditionally. It bounds how long a genuine step can be disbelieved – at a 10 ms rate, 5 samples is 50 ms of staleness in the worst case. At 1 the gate can suppress only isolated single-sample glitches.
  • Initial Value – a scalar: the held value before the first sample, which has nothing to be compared against. If it is far from where the signal really starts, the first samples are rejected until the override releases them.
  • Sampling Time (s) – zero or less inherits the solver's rate; a positive value runs the block at that period.

Code export

All ten targets: Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog and PLC Structured Text. Every parameter is baked into the body at export time; there is no tunable parameter object.

The three HDL targets are genuine synthesizable Q16.16: one subtraction, one absolute value, comparisons, an increment and a select, with no division and nothing transcendental. The rejection counter is carried as a fixed-point whole number and compared against one, so it never has to be converted out of fixed point.

Simulink bridge

None. No installed library carries this block: the toolboxes whose blocks would (Robotics System, Navigation, Sensor Fusion) are not present on this machine, and nothing in base Simulink gates a sample against the last accepted one. Rate Limiter is the nearest thing and is a different function – it clamps the step and so passes a modified sample through, moving toward the outlier every sample, where this block passes the sample unchanged or not at all. The bridge entry therefore reports the block with that reason instead of dropping it silently, and no parity testbench is owed – the documented consequence of Support::None. Code export verification still covers all ten languages.

Notes

  • Stateful and inherently discrete (setDiscreteOnlyBlock(true)): "the last accepted sample" only means anything per sample, and there is no derivative to integrate.
  • The counter needs no saturation, unlike Watchdog Timer's. At Max Consecutive Rejects the next sample is accepted unconditionally and the count returns to 0, so it is bounded by construction rather than by a clamp.
  • It never averages and never delays a clean signal – the whole difference from Moving Median beside it. A median distorts every sample and costs half a window of lag on all of them; this block is exact pass-through on accepted samples and holds only on rejected ones. Prefer the median against dense noise, this against sparse corruption – a dropped frame, an ADC glitch, a lidar return off a raindrop.
  • Nonlinear, and deliberately carries no state space. A comparison, a select and a counter are not describable by A/B/C/D, so model reduction correctly refuses the block.
  • On the HDL targets the comparison is made in Q16.16, so a sample whose distance sits within one quantum (about 1.5e−5) of Reject Threshold can be classified the other way from the software targets. The consequence is a whole sample accepted instead of held – a decision output, not a rounding error, exactly as in Argmax Decision. Choose a threshold the signal's own steps do not sit on top of.
  • Choosing the pair is the whole design. A threshold below the signal's real motion rejects healthy samples and leans on the override to pass them, which is a slow, lossy pass-through; one above the corruption rejects nothing. Record the sample-to-sample distance on a healthy run before choosing either.

Code facts#

FactValue
registered typeRobotics/Perception_Filters/Outlier_Reject_Hold
familyRobotics/Perception_Filters
solver environment classICoreBlock_0_Robotics_1_Perception_Filters_2_Outlier_Reject_Hold
sourcesrc/ICoreSDK/ICoreBlockLibrary/Blocks/Robotics/Perception_Filters/Outlier_Reject_Hold/ICoreBlock_0_Robotics_1_Perception_Filters_2_Outlier_Reject_Hold.cpp
headersrc/ICoreSDK/ICoreBlockLibrary/Blocks/Robotics/Perception_Filters/Outlier_Reject_Hold/ICoreBlock_0_Robotics_1_Perception_Filters_2_Outlier_Reject_Hold.h
default size on canvas140 × 80 px
ports at insert1 in, 2 out
code generators implementedPython, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text

Ports#

#DirectionSignal typeDescription label
1inICoreDoubleu
2outICoreDoubley
3outICoreDoublerejects

Ports the constructor creates. A block whose port list changes with its configuration adds or removes ports at load time; the count above is the one a freshly inserted block has.

Configuration variables#

Config variableDefaultSimulink parameter
Reject Threshold1
Max Consecutive Rejects5
Initial Value0

Every block also carries Sampling Time (s) from ICoreBlockSolverEnvironment: zero or less inherits the solver's rate, a positive value runs the block at that period.

supportSupport::None
Simulink path
port-count rulePortsParam::None
SampleTime parameteryes

Caveat (shown to the user): no Simulink equivalent available: nothing in the installed libraries gates a sample against the last ACCEPTED one. Rate Limiter is the nearest base-Simulink block and is a different function -- it CLAMPS the step, so a corrupt sample still moves the output toward itself on every sample, where this block passes a sample unchanged or not at all; and the toolboxes whose blocks would do this (Robotics System, Navigation, Sensor Fusion) are not installed on this machine. Rebuild it on the Simulink side from a Unit Delay, an Abs, a Compare To Constant, a Switch and a counter, keeping the consecutive-reject override this block documents -- without it the gate holds a stale value forever after a genuine step

Catalog contract: src/ICoreSDK/ICoreCoder/ICoreCommandSystem/SimulinkBridge/ICoreSimulinkBlockCatalog.h

Description vs code#

The lists agree. check_block_descriptions.py finds no disagreement between the description's Ports, Parameters, Code export and Simulink bridge lists and the code's.

The verdict above is tools/docs/check_block_descriptions.py (P7.1), which compares LISTS. It cannot read a sentence: "stateless" on a block with a state, an initial-value semantic the recursion does not implement, a "not synthesizable" caveat the HDL banner contradicts. That is the agent audit (P7.3) on BLOCK_DESCRIPTION_AUDIT.md, and this tool's green is not a substitute for one.

File banner (developer view)#

The top comment of the block's .cpp — the maths, the realization and the export strategy, addressed to whoever changes it. It must not contradict the description above (P7.5).

Outlier Reject and Hold — a validation gate for a single sensor channel A sample that disagrees with the last ACCEPTED one by more than a threshold is discarded and the held value republished:

d = |u[k] - held| forced = ( rejects >= Max Consecutive Rejects ) accept = ( d <= Reject Threshold ) OR forced held = accept ? u[k] : held rejects = accept ? 0 : rejects + 1 y = held

Three properties, each load-bearing:

  1. THE OVERRIDE IS NOT A SAFETY NET, IT IS THE DESIGN. A genuine STEP is indistinguishable

from an outlier at the moment it arrives, so a gate without an override rejects every sample from the step onward and holds a stale value forever -- blinding the controller it was installed to protect. Max Consecutive Rejects is the bound on how long a real change may be disbelieved.

  1. THE COUNTER NEEDS NO SATURATION, unlike Watchdog_Timer's. At M the next sample is accepted

unconditionally and the count returns to 0, so it is bounded in [0, M] BY CONSTRUCTION. Stated because a reader arriving from that block will look for the clamp that is absent.

  1. NO DIVISION, NO TRANSCENDENTAL, NO CONVERSION OUT OF FIXED POINT. One subtraction, one

absolute value, comparisons, an increment and a select -- so the three HDL targets are genuine synthesizable Q16.16 and every language is exact.

⚠ It never averages and never delays a clean signal, which is the whole difference from Moving_Median beside it: accepted samples pass through bit-exact and only rejected ones hold.

Sample results#

Outlier Reject Hold — Step: 0 -> 1 at t = 1 sOutlier Reject Hold — Step: 0 -> 1 at t = 1 s00.51012345t (s)in ICoreDouble-Out-0out ICoreDouble-Out-0out ICoreDouble-Out-1

The same rig also ran:

StimulusWhat it isOutput range
impulseImpulse: one sample of 1 at k = 5, 0 elsewhere (Repeating Sequence Stair)0 … 1
rampRamp: slope 1 from t = 00 … 5.8
sineSine Wave: amplitude 1, 2 rad/s, no phase, no bias-1 … 0.9996
tableRepeating Sequence Stair: [-2 -1 -0.5 0 0.5 1 2 3], one entry per sample-1 … 3

Plotted: step — Step: 0 -> 1 at t = 1 s

Category dynamic · sample time 0.1 · 60 steps · commit ccf005c8 · produced by docsSample --out <folder> --steps 60 · data docs/generated/samples/Robotics__Perception_Filters__Outlier_Reject_Hold.json · the SVG is generated from those numbers by tools/docs/plot_svg.py, so it is a run and not a drawing (R-D10).