Quaternion Division — Robotics/Orientation 3D
Robotics/Orientation_3D/Quaternion_Division · 2 input / 1 output port(s) at insert · exports to Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text
Description#
The block's own DESCRIPTION_HTML, rendered verbatim — the same text the config dialog's info panel and the library navigator show. Fix a wrong sentence in the block's .cpp (R-D9), never here.
Quaternion Division
Robotics / Orientation 3D
Divides one quaternion by another, both stored scalar-first as [w x y z]T. Division by a quaternion means multiplication by its inverse, and because the Hamilton product is not commutative there are two of those. This block computes the left one:
- t = q / r = r⁻¹ ⊗ q
Equivalently, with n = r · r the squared norm of the divisor:
- t = (r* ⊗ q) / n
The side is not a detail. r⁻¹ ⊗ q and q ⊗ r⁻¹ share their scalar component exactly and differ in all three vector components, so they are genuinely different quaternions that look alike if you only check one number. If you want the other one, put Quaternion Inverse on r and feed a Quaternion Multiply in the order you want.
Ports
- q – the dividend, a [4,1] column [w x y z]T.
- r – the divisor, also [4,1]. Its squared norm is what the result is divided by, so a small r makes a large t.
- t – the quotient r⁻¹ ⊗ q, [4,1]. Its size is fixed, not inherited.
Parameters
- Sampling Time (s) – zero or less inherits the solver's rate; a positive value runs the block at that period.
Code export
All ten targets: Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog and PLC Structured Text. There is no tunable parameter, because the block has no parameter at all – both operands arrive on ports.
Every backend accumulates each numerator component's four products in the same order and takes one reciprocal of n, shared by all four. Four independent divisions would be arithmetically equivalent and would round differently, so this is part of the contract rather than an optimisation.
On the three HDL targets the block is offered as simulation-only: a Q16.16 datapath has no division, so the reciprocal and the four products go through real arithmetic and only the ports quantize. This is the same choice Recursive IIR and Variable Transport Delay make.
Simulink bridge
Both directions, onto aerolibutil/Quaternion Division
in the Aerospace Blockset. The block has no configuration, so no
parameter pairs cross, and the port order is the mapping: q is the
Simulink block's first input and r its second.
Its name is drawn on two lines, so the real library path carries an
embedded newline between Quaternion and
Division; the flattened one-line spelling resolves to nothing. And
the block defines no SampleTime parameter, so the rate stays
on the ICore side and a block configured with an explicit positive rate reports
that the rate did not cross.
Notes
- Algebraic and stateless: the output depends only on the current inputs, so the block cannot break an algebraic loop.
- Left division, r⁻¹ ⊗ q – measured against the Simulink block, not inferred from its name. The two readings agree in the scalar component, so an implementation that picked the wrong side passes any check that looks only at w.
- The divisor is r's SQUARED norm, not its modulus – the same trap Quaternion Inverse carries, and invisible on unit quaternions for the same reason, because there the two are both 1.
- A zero divisor has no answer: the six software targets produce NaN, the three HDL targets produce zero, because fixed point has no NaN. Nothing upstream is checked and no error is logged.
- Bilinear in the pair, so deliberately no state space – it is linear in q with r held fixed and nonlinear in the pair. A fabricated linear form would let model reduction merge matrices that do not describe this block.
Code facts#
| Fact | Value |
|---|---|
| registered type | Robotics/Orientation_3D/Quaternion_Division |
| family | Robotics/Orientation_3D |
| solver environment class | ICoreBlock_0_Robotics_1_Orientation_3D_2_Quaternion_Division |
| source | src/ICoreBlocks/ICoreBlockLibrary/Blocks/Robotics/Orientation_3D/Quaternion_Division/ICoreBlock_0_Robotics_1_Orientation_3D_2_Quaternion_Division.cpp |
| header | src/ICoreBlocks/ICoreBlockLibrary/Blocks/Robotics/Orientation_3D/Quaternion_Division/ICoreBlock_0_Robotics_1_Orientation_3D_2_Quaternion_Division.h |
| default size on canvas | 126 × 84 px |
| ports at insert | 2 in, 1 out |
| code generators implemented | Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text |
Ports#
| # | Direction | Signal type | Description label |
|---|---|---|---|
| 1 | in | ICoreDouble | q |
| 2 | in | ICoreDouble | r |
| 3 | out | ICoreDouble | t |
Ports the constructor creates. A block whose port list changes with its configuration adds or removes ports at load time; the count above is the one a freshly inserted block has.
Configuration variables#
No config variable beyond the Sampling Time (s) every block carries.
Every block also carries Sampling Time (s) from ICoreBlockSolverEnvironment: zero or less inherits the solver's rate, a positive value runs the block at that period.
Simulink bridge#
| support | Support::Both |
| Simulink path | aerolibutil/Quaternion\nDivision |
| port-count rule | PortsParam::None |
SampleTime parameter | no — the counterpart defines none; the rate stays on the ICore side |
Caveat (shown to the user): the Aerospace Blockset block is a masked subsystem with no dialog parameters, so nothing but the signal crosses; the port ORDER is the whole mapping, q first and r second, because the block computes LEFT division r^-1 (x) q. Note it defines no SampleTime parameter: an ICore rate set explicitly stays on this side and is reported
Catalog contract: src/ICoreBlocks/ICoreCoder/ICoreCommandSystem/SimulinkBridge/ICoreSimulinkBlockCatalog.h
Description vs code#
The checker has a blind spot here — it could not resolve something (a grouped port bullet, a computed config name), which is reported and never counted as a pass. A reader has to settle it:
B0no sample under docs/generated/samples/ — nothing to cross-check (P8.1)
The verdict above is
tools/docs/check_block_descriptions.py(P7.1), which compares LISTS. It cannot read a sentence: "stateless" on a block with a state, an initial-value semantic the recursion does not implement, a "not synthesizable" caveat the HDL banner contradicts. That is the agent audit (P7.3) on BLOCK_DESCRIPTION_AUDIT.md, and this tool's green is not a substitute for one.
File banner (developer view)#
The top comment of the block's .cpp — the maths, the realization and the export strategy, addressed to whoever changes it. It must not contradict the description above (P7.5).
Quaternion Division — t = q / r = r^-1 (x) q, scalar-first [4,1] n = r0^2 + r1^2 + r2^2 + r3^2 t0 = ( r0*q0 + r1*q1 + r2*q2 + r3*q3 ) / n t1 = ( r0*q1 - r1*q0 - r2*q3 + r3*q2 ) / n t2 = ( r0*q2 + r1*q3 - r2*q0 - r3*q1 ) / n t3 = ( r0*q3 - r1*q2 + r2*q1 - r3*q0 ) / n
⚠⚠ IT IS LEFT DIVISION, AND THAT WAS MEASURED RATHER THAN ASSUMED. See the header for the probe: q (x) r^-1 and r^-1 (x) q agree in the SCALAR component and differ in all three vector components, so only a probe that read the whole quaternion could tell them apart -- and the board's Family G row, which said "q1 (x) q2^-1", had it the other way round. The four expressions above reproduce every measured component of R2026a's block to the last bit.
⚠ THE TERM ORDER IS THE CONTRACT. Each numerator accumulates its four products in r-index order, r0 then r1 then r2 then r3, and every one of the ten backends spells it that way. Floating-point addition is not associative, so a backend that grouped them differently would disagree in the last ulp on most samples -- a row that moves for a reason having nothing to do with the export.
⚠ ONE RECIPROCAL, NOT FOUR DIVISIONS -- the same contract as Quaternion_Inverse.
⚠ SIMULATION-ONLY on the three HDL targets: Q16.16 has no division.
Sample results#
No sample run is committed for this block. Samples come from the headless harness (DOCS_PLAN.md P8.1) into docs/generated/samples/; until one exists this block's behaviour is witnessed by the parity and export-verification suites, not by a plot here.