Generated reference › Time Synchronous Average — Control Systems/Vibration
kind: generated#block#control-systems-vibration

Time Synchronous Average — Control Systems/Vibration

Control_Systems/Vibration/Time_Synchronous_Average · 1 input / 1 output port(s) at insert · exports to Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text

Description#

The block's own DESCRIPTION_HTML, rendered verbatim — the same text the config dialog's info panel and the library navigator show. Fix a wrong sentence in the block's .cpp (R-D9), never here.

Time Synchronous Average

Control Systems / Vibration

Averages the last R revolutions of a signal, one entry per sample of a revolution:

avg[j] = (1 ÷ R)·Σr u[(R−1−r)·P + j]

This is MATLAB's tsa. Everything that repeats with the shaft survives the average; everything that does not is attenuated, and it falls as 1÷√R – so four revolutions halve the asynchronous noise and sixteen quarter it.

Ports

  • u – the sampled signal. Scalar: one channel and its own history – see Notes.
  • avg – the averaged revolution, [P, 1], oldest sample of the revolution first. Its height follows Samples Per Revolution alone.

Parameters

  • Samples Per Revolution – P, how many samples one revolution occupies. A whole number from 2 to 64. At a sampling rate fs and a shaft speed of N revolutions per minute, P = 60·fs÷N, and it has to come out whole – see Notes.
  • Number of Revolutions – R, how many are averaged. A whole number from 2 to 32. More revolutions suppress more asynchronous content and lengthen the memory: the block looks P·R samples back, which may not exceed 512.
  • Sampling Time (s) – zero or less inherits the solver's rate; a positive value runs the block at that period.

Code export

All ten targets: Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog and PLC Structured Text.

Nothing divides in a generated core. R is fixed by the configuration, so 1÷R is a number computed at export time and inlined; a core carries a shift register of P·R samples, a revolution counter, and P multiply-accumulates of R terms each. Both settings are structural – together they decide how long the register is and how many outputs there are – so re-export after changing either.

The three HDL targets are genuine synthesizable Q16.16: adds and one constant multiply, with the products accumulated at full width and shifted back once per output row.

Simulink bridge

None (Support::None). tsa is a Signal Processing Toolbox function and that toolbox ships no Simulink library, so there is no path a diagram could name. The bridge reports this block rather than dropping it silently, and it therefore has no parity testbench; code export verification still covers it across all ten languages.

Notes

  • Stateful, and discrete by nature (setDiscreteOnlyBlock(true)).
  • ⚠ The period is a parameter here and MATLAB takes it from a tachometer. That is the one real departure, and it is the same fork Fourier Fit meets with its fundamental: with P given a revolution is a fixed number of samples and the average is a fixed bank of weights, which is what makes the block exportable at all. With a tacho the revolutions are fractional in samples and have to be resampled onto a common grid, which is what tsa's Method option (linear, spline, pchip, fft) exists to choose between.
  • ⚠ And on the case this block covers, all four of those methods coincide. Measured rather than assumed: with revolutions that are a whole number of samples there is nothing to resample, and R2026a's tsa at its default reproduces the plain arithmetic mean of the cycles to 8.9e−16 over five revolutions of eight samples. This block is not an approximation of tsa; it is tsa restricted to the case where tsa has no choice to make.
  • ⚠ If P does not come out whole, this is the wrong block. 60·fs÷N is a whole number only at particular speeds; anywhere else the shaft drifts against the sample grid, entry j stops being the same shaft angle from one revolution to the next, and the average smears the very features it exists to sharpen. Change the sampling rate so it divides, or resample the signal first.
  • ⚠ The phase origin is the start of the run. Without a tacho there is nothing else it could be: entry 0 is a fixed number of samples after the first sample of the run, not a known shaft angle. The shape is right and its rotation within the vector is arbitrary, so compare shapes across runs only if they start together.
  • The average is republished once per revolution and held in between. Recomputing it every sample would be correct arithmetic and a useless block: the phase reference would advance by one entry per sample and the shape would appear to rotate. Held, it is stable for the P samples a reader is looking at it.
  • The first P·R−1 samples are a startup transient: the register is zero-prefilled, so early revolutions are averaged against zeros. The output is all zeros until the first full revolution completes.
  • Scalar only. One channel and its own history; wire one block per channel.
  • No state space. Linear in the input, but through a fixed bank over P·R past samples rather than an A/B/C/D pair, so model reduction correctly declines to merge it.

Code facts#

FactValue
registered typeControl_Systems/Vibration/Time_Synchronous_Average
familyControl_Systems/Vibration
solver environment classICoreBlock_0_Control_Systems_1_Vibration_2_Time_Synchronous_Average
sourcesrc/ICoreBlocks/ICoreBlockLibrary/Blocks/Control_Systems/Vibration/Time_Synchronous_Average/ICoreBlock_0_Control_Systems_1_Vibration_2_Time_Synchronous_Average.cpp
headersrc/ICoreBlocks/ICoreBlockLibrary/Blocks/Control_Systems/Vibration/Time_Synchronous_Average/ICoreBlock_0_Control_Systems_1_Vibration_2_Time_Synchronous_Average.h
default size on canvas150 × 76 px
ports at insert1 in, 1 out
code generators implementedPython, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text

Ports#

#DirectionSignal typeDescription label
1inICoreDoubleu
2outICoreDoubleavg

Ports the constructor creates. A block whose port list changes with its configuration adds or removes ports at load time; the count above is the one a freshly inserted block has.

Configuration variables#

Config variableDefaultSimulink parameter
Samples Per Revolution8—
Number of Revolutions4—

Every block also carries Sampling Time (s) from ICoreBlockSolverEnvironment: zero or less inherits the solver's rate, a positive value runs the block at that period.

supportSupport::None
Simulink path—
port-count rulePortsParam::None
SampleTime parameteryes

Caveat (shown to the user): tsa is a Signal Processing Toolbox function, not a Simulink library block -- that toolbox ships no Simulink library at all -- so there is no path a diagram could name; the block is reported rather than dropped when a model crosses

Catalog contract: src/ICoreBlocks/ICoreCoder/ICoreCommandSystem/SimulinkBridge/ICoreSimulinkBlockCatalog.h

Description vs code#

The lists agree. check_block_descriptions.py finds no disagreement between the description's Ports, Parameters, Code export and Simulink bridge lists and the code's.

The verdict above is tools/docs/check_block_descriptions.py (P7.1), which compares LISTS. It cannot read a sentence: "stateless" on a block with a state, an initial-value semantic the recursion does not implement, a "not synthesizable" caveat the HDL banner contradicts. That is the agent audit (P7.3) on BLOCK_DESCRIPTION_AUDIT.md, and this tool's green is not a substitute for one.

File banner (developer view)#

The top comment of the block's .cpp — the maths, the realization and the export strategy, addressed to whoever changes it. It must not contradict the description above (P7.5).

Time Synchronous Average -- MATLAB's tsa over a running window The average of the last R revolutions, one entry per sample of a revolution:

avg[j] = (1/R) * SUM(r = 0..R-1) u[ (R-1-r)*P + j ] j = 0 .. P-1

Everything synchronous with the shaft survives; everything else averages away as 1/sqrt(R).

MEASURED AGAINST R2026a BEFORE ANY CODE WAS WRITTEN. tsa offers four averaging Methods (linear, spline, pchip, fft) and on the case this block covers -- revolutions that are a WHOLE NUMBER of samples -- all four coincide, because there is nothing to resample: over 5 revolutions of 8 samples, tsa at its default reproduces the plain arithmetic mean of the cycles to 8.9e-16. So this is not an approximation of tsa; it is tsa restricted to the case where tsa itself has no choice to make.

⚠ THE PERIOD IS A PARAMETER AND MATLAB TAKES IT FROM A TACHOMETER -- Fourier_Fit's fork, for Fourier_Fit's reason. With P given, the whole thing is a fixed bank of 1/R weights over a shift register: no division, no transcendental, and all three HDL targets are genuine synthesizable Q16.16.

⚠ THE AVERAGE IS REPUBLISHED ONCE PER REVOLUTION AND HELD IN BETWEEN. Recomputing it every sample would be correct arithmetic and a useless block: the vector's phase reference would advance by one entry per sample and a reader would watch the shape rotate. The held form is stable for the P samples a reader is looking at it.

Sample results#

Time Synchronous Average — Step: 0 -> 1 at t = 1 sTime Synchronous Average — Step: 0 -> 1 at t = 1 s00.51012345t (s)in ICoreDouble-Out-0out ICoreDouble-Out-0 [8x1] entry 0

The same rig also ran:

StimulusWhat it isOutput range
impulseImpulse: one sample of 1 at k = 5, 0 elsewhere (Repeating Sequence Stair)0 … 0
rampRamp: slope 1 from t = 00 … 3.6
sineSine Wave: amplitude 1, 2 rad/s, no phase, no bias-0.01615 … 0.2499
tableRepeating Sequence Stair: [-2 -1 -0.5 0 0.5 1 2 3], one entry per sample-2 … 0

Plotted: step — Step: 0 -> 1 at t = 1 s

Category dynamic · sample time 0.1 · 60 steps · commit 0a5debc4ee1c8d80171981b1007ff9def25c6159 · produced by docsSample --out <folder> --blocks Time_Synchronous_Average --steps 60 · data docs/generated/samples/Control_Systems__Vibration__Time_Synchronous_Average.json · the SVG is generated from those numbers by tools/docs/plot_svg.py, so it is a run and not a drawing (R-D10).