String Find — Control Systems/Strings
Control_Systems/Strings/String_Find · 2 input / 1 output port(s) at insert · exports to Python, MATLAB, Java, Rust, C, C++
Description#
The block's own DESCRIPTION_HTML, rendered verbatim — the same text the config dialog's info panel and the library navigator show. Fix a wrong sentence in the block's .cpp (R-D9), never here.
String Find
Control Systems / Strings
Reports where one piece of text first occurs inside another: y = the position of the first occurrence of u2 in u1, or -1 when u2 does not occur at all.
Ports
- u1 (
str,ICoreString) – the text being searched. - u2 (
str,ICoreString) – the text being looked for. - Output (
i32,ICoreInt32) – the position, one value. Signed, because a miss is reported as -1.
Parameters
- Sampling Time (s) – zero or less inherits the solver's rate; a positive value runs the block at that period.
Counting from one
The first byte of u1 is position 1, not 0. "cat" in "concat" answers 4; text found at the very beginning answers 1. This is the same convention Simulink uses and the same one MATLAB uses, and it is why the output of this block can be fed straight to Substring without an adjustment in between.
When it is not there
A miss answers -1, which is why this output is a signed integer where String Count's and String Length's are unsigned. Test for it with a comparison against 0: any answer of 1 or more is a real position.
Finding nothing
An empty u2 answers 1: the empty piece of text sits at the very front of everything. This is what Simulink answers and what every generated target answers.
Upper and lower case are different
"Cat" is not found in "concat". Simulink's own String Find block has no case-sensitivity setting either, so here there is nothing to choose and nothing reported.
Code export
C, C++, Python, MATLAB, Java and Rust all report the same position. Most of those languages count from 0 and report a miss in their own way, so the generated code converts explicitly rather than passing the built-in's answer straight through.
VHDL, Verilog and SystemVerilog do not carry text, and PLC Structured Text is not supported either: the language has a string type, but the check that runs an exported core cannot read one back. Since this block's inputs are always text, an export to any of these four stops and names this block and the reason.
Simulink bridge
Import and export, mapped to simulink/String/String Find, whose output
is set to int32 to match. The Simulink block has no sampling-time
setting of its own, so a positive Sampling Time (s) stays on this side
and is reported rather than written.
Simulink reports the position in characters where this block reports it in bytes; the two agree for plain ASCII text and differ by design on anything else, exactly as String Length records.
Notes
- Algebraic, with no state: the output depends only on the current inputs.
- An unconnected text input is empty text.
- Only the first occurrence is reported. Use String Count to learn how many there are.
Code facts#
| Fact | Value |
|---|---|
| registered type | Control_Systems/Strings/String_Find |
| family | Control_Systems/Strings |
| solver environment class | ICoreBlock_0_Control_Systems_1_Strings_2_String_Find |
| source | src/ICoreBlocks/ICoreBlockLibrary/Blocks/Control_Systems/Strings/String_Find/ICoreBlock_0_Control_Systems_1_Strings_2_String_Find.cpp |
| header | src/ICoreBlocks/ICoreBlockLibrary/Blocks/Control_Systems/Strings/String_Find/ICoreBlock_0_Control_Systems_1_Strings_2_String_Find.h |
| default size on canvas | 90 × 70 px |
| ports at insert | 2 in, 1 out |
| code generators implemented | Python, MATLAB, Java, Rust, C, C++ |
Ports#
| # | Direction | Signal type | Description label |
|---|---|---|---|
| 1 | in | ICoreString | u1 |
| 2 | in | ICoreString | u2 |
| 3 | out | ICoreInt32 | — |
Ports the constructor creates. A block whose port list changes with its configuration adds or removes ports at load time; the count above is the one a freshly inserted block has.
Configuration variables#
No config variable beyond the Sampling Time (s) every block carries.
Every block also carries Sampling Time (s) from ICoreBlockSolverEnvironment: zero or less inherits the solver's rate, a positive value runs the block at that period.
Simulink bridge#
| support | Support::Both |
| Simulink path | simulink/String/String Find |
| port-count rule | PortsParam:: |
SampleTime parameter | no — the counterpart defines none; the rate stays on the ICore side |
Caveat (shown to the user): The position is 1-BASED on both sides and a miss is -1 on both sides, measured on R2026a ('cat' in 'concat' answers 4, a miss answers -1, and
Catalog contract: src/ICoreBlocks/ICoreCoder/ICoreCommandSystem/SimulinkBridge/ICoreSimulinkBlockCatalog.h
Description vs code#
The checker has a blind spot here — it could not resolve something (a grouped port bullet, a computed config name), which is reported and never counted as a pass. A reader has to settle it:
B0no sample under docs/generated/samples/ — nothing to cross-check (P8.1)
The verdict above is
tools/docs/check_block_descriptions.py(P7.1), which compares LISTS. It cannot read a sentence: "stateless" on a block with a state, an initial-value semantic the recursion does not implement, a "not synthesizable" caveat the HDL banner contradicts. That is the agent audit (P7.3) on BLOCK_DESCRIPTION_AUDIT.md, and this tool's green is not a substitute for one.
File banner (developer view)#
The top comment of the block's .cpp — the maths, the realization and the export strategy, addressed to whoever changes it. It must not contradict the description above (P7.5).
String Find -- where one piece of text first occurs in another y = the 1-based byte position of the first occurrence of u2 in u1, or -1 when there is none. Three measured facts carry this block and the header has all three: the position is 1-based, a miss is -1 (which is why the output port is SIGNED), and an empty u2 answers 1.
Six of the seven target languages index from zero. Every generator below therefore adds one to a found position and writes the miss out explicitly, rather than passing its own language's return value through -- an off-by-one that is correct at a miss is the hardest kind to notice in a run that mostly misses.
Sample results#
No sample run is committed for this block. Samples come from the headless harness (DOCS_PLAN.md P8.1) into docs/generated/samples/; until one exists this block's behaviour is witnessed by the parity and export-verification suites, not by a plot here.