Generated reference › Chirp Signal — Control Systems/Sources
kind: generated#block#control-systems-sources

Chirp Signal — Control Systems/Sources

Control_Systems/Sources/Chirp_Signal · 0 input / 1 output port(s) at insert · exports to Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text

Description#

The block's own DESCRIPTION_HTML, rendered verbatim — the same text the config dialog's info panel and the library navigator show. Fix a wrong sentence in the block's .cpp (R-D9), never here.

Chirp Signal

Control Systems / Sources

A source generating a sine whose frequency climbs linearly with time – a swept-frequency cosine, the standard stimulus for measuring a frequency response in one run:

y(t) = sin( 2π·(f₁ + (f₂ − f₁)·t / (2T))·t )

The bracket is the average frequency over the interval so far, because the phase is the integral of the frequency ramp. The instantaneous frequency is f₁ + (f₂ − f₁)·t/T, which reaches f₂ exactly at the target time T.

Ports

  • Output – the generated sweep, amplitude fixed at 1. It has no inputs; the signal is generated from the block's own clock.

Parameters

  • Initial Frequency (Hz) – f₁, the instantaneous frequency at t = 0, in hertz rather than radians per second. This is the opposite convention to Sine Wave, and it is Simulink's on both blocks.
  • Target Time (s) – T, the instant at which the sweep is to reach f₂. It sets the rate of the sweep and nothing else – see the note below about what does not happen at T. It may not be zero.
  • Frequency at Target Time (Hz) – f₂, the instantaneous frequency the sweep reaches at T, in hertz. It may be below f₁, which sweeps downwards.
  • Sampling Time (s) – zero or less inherits the solver's rate; a positive value runs the block at that period. It also sets how finely the sweep is resolved, and a chirp is the block most likely to outrun it: once the instantaneous frequency passes half the sample rate the output aliases, which looks like the sweep folding back down again.

Vector parameters

Any of the three may be a vector or matrix instead of a scalar: the others are then expanded to match, and the output takes that shape – one sweep per entry, each with its own start, rate and target. Non-scalar parameters must agree in size, and the run stops with a message naming the block if they do not.

Code export

All ten targets: Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog and PLC Structured Text. Each uses a per-block local sample clock rather than a global one, and the three frequencies are exposed as tunable parameters on the generated core. 2π is emitted as a single 17-digit literal shared by every backend rather than each using its own constant, so the ten agree bit for bit rather than to within whichever value each language ships. The three HDL targets carry the wave in simulation-only form: the sine is evaluated in real arithmetic and quantized on the way out to the fixed-point signal ports.

Simulink bridge

Import and export, mapped to simulink/Sources/Chirp Signal. "Initial Frequency (Hz)" to f1, "Target Time (s)" to T, "Frequency at Target Time (Hz)" to f2. Simulink's VectorParams1D distinguishes a 1-D vector from an Nx1 matrix, a distinction ICore does not draw, and is left at its default.

Simulink's Chirp Signal has no SampleTime parameter, so "Sampling Time (s)" does not cross – the exported block runs at the surrounding Simulink rate. That is a genuine difference from most of the library, where the rate is mapped globally, and it matters more here than elsewhere because the rate is what decides whether a fast sweep aliases.

Notes

  • Time-driven and stateless: the output depends only on the current time, and a re-run reproduces it exactly.
  • Nothing happens at the target time. T sets the sweep rate; it is not a period and not an end. Past T the frequency simply keeps climbing at the same rate, and the signal neither stops, resets nor repeats. This was checked against Simulink over a run three times longer than T, where the two agree throughout, so a model that wants the sweep to stop there has to stop it itself.
  • Amplitude is fixed at 1 and there is no bias or phase offset, on this side and in Simulink alike. Follow the block with a Gain and a Bias if a swept signal of some other size or offset is wanted.

Code facts#

FactValue
registered typeControl_Systems/Sources/Chirp_Signal
familyControl_Systems/Sources
solver environment classICoreBlock_0_Control_Systems_1_Sources_2_Chirp_Signal
sourcesrc/ICoreSDK/ICoreBlockLibrary/Blocks/Control_Systems/Sources/Chirp_Signal/ICoreBlock_0_Control_Systems_1_Sources_2_Chirp_Signal.cpp
headersrc/ICoreSDK/ICoreBlockLibrary/Blocks/Control_Systems/Sources/Chirp_Signal/ICoreBlock_0_Control_Systems_1_Sources_2_Chirp_Signal.h
default size on canvas70 × 70 px
ports at insert0 in, 1 out
code generators implementedPython, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text

Ports#

#DirectionSignal typeDescription label
1outICoreDouble

Ports the constructor creates. A block whose port list changes with its configuration adds or removes ports at load time; the count above is the one a freshly inserted block has.

Configuration variables#

Config variableDefaultSimulink parameter
Initial Frequency (Hz)0.1f1
Target Time (s)100T
Frequency at Target Time (Hz)1f2

Every block also carries Sampling Time (s) from ICoreBlockSolverEnvironment: zero or less inherits the solver's rate, a positive value runs the block at that period.

supportSupport::Both
Simulink pathsimulink/Sources/Chirp Signal
port-count rulePortsParam::None
SampleTime parameterno — the counterpart defines none; the rate stays on the ICore side
ICore configSimulink parameterValue translation
Initial Frequency (Hz)f1passes through
Target Time (s)Tpasses through
Frequency at Target Time (Hz)f2passes through

Caveat (shown to the user): the block runs at the surrounding Simulink rate; "Sampling Time (s)" does not cross, which matters here because the rate is what decides whether a fast sweep aliases

Catalog contract: src/ICoreSDK/ICoreCoder/ICoreCommandSystem/SimulinkBridge/ICoreSimulinkBlockCatalog.h

Description vs code#

The lists agree. check_block_descriptions.py finds no disagreement between the description's Ports, Parameters, Code export and Simulink bridge lists and the code's.

The verdict above is tools/docs/check_block_descriptions.py (P7.1), which compares LISTS. It cannot read a sentence: "stateless" on a block with a state, an initial-value semantic the recursion does not implement, a "not synthesizable" caveat the HDL banner contradicts. That is the agent audit (P7.3) on BLOCK_DESCRIPTION_AUDIT.md, and this tool's green is not a substitute for one.

File banner (developer view)#

The top comment of the block's .cpp — the maths, the realization and the export strategy, addressed to whoever changes it. It must not contradict the description above (P7.5).

Chirp Signal block — a sine whose frequency sweeps linearly with time y(t) = sin( 2*pi * (f1 + (f2 - f1) * t / (2*T)) * t )

The bracket is the AVERAGE frequency over [0, t], not the instantaneous one: the phase is the integral of a frequency ramping from f1 at t = 0 to f2 at t = T, and integrating a linear ramp is what puts the 2 in the denominator. The instantaneous frequency at time t is f1 + (f2 - f1)*t/T, which reaches f2 exactly at the target time.

Verified against simulink/Sources/Chirp Signal over a run three times longer than T: the closed form above matches it to 2.8e-14 throughout, and the sweep does NOT reset or repeat at T -- the frequency simply keeps climbing at the same rate. That last point is the one worth knowing, because the parameter is called "target time" and reads like a period.

Code export: all ten targets. f1, T and f2 are exposed as tunable parameters on the generated core, and 2*pi is emitted as one shared 17-digit literal rather than each target reaching for its own constant, so the ten agree bit for bit. The three HDL targets carry the wave in SIMULATION-ONLY form: the sine is evaluated in real arithmetic from the testbench's sim_time and quantized only on the way out to the fixed-point ports.

Sample results#

Chirp Signal — No input: the block run aloneChirp Signal — No input: the block run alone-1-0.500.51012345t (s)

Plotted: free — No input: the block run alone

Category source · sample time 0.1 · 60 steps · commit ccf005c8 · produced by docsSample --out <folder> --steps 60 · data docs/generated/samples/Control_Systems__Sources__Chirp_Signal.json · the SVG is generated from those numbers by tools/docs/plot_svg.py, so it is a run and not a drawing (R-D10).