Pulse Period — Control Systems/Pulse Metrics
Control_Systems/Pulse_Metrics/Pulse_Period · 1 input / 1 output port(s) at insert · exports to Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text
Description#
The block's own DESCRIPTION_HTML, rendered verbatim — the same text the config dialog's info panel and the library navigator show. Fix a wrong sentence in the block's .cpp (R-D9), never here.
Pulse Period
Control Systems / Pulse Metrics
Reports the period of the most recent completed pulse cycle – the
time from one opening mid crossing to the NEXT opening mid crossing of the same
polarity, which is MATLAB's pulseperiod. It is the pulse's width
plus the separation that follows it.
Ports
- u – the bilevel waveform to measure. Scalar – see Notes.
- p – the period of the most recent completed cycle, in seconds, held until the next one completes. Scalar.
Parameters
- Low State Level – the value the waveform sits at in its low state. 0 by default.
- High State Level – the value it sits at in its high state. 1 by default. Every threshold below is a percentage of the distance between these two, so they must differ.
- State Level Tolerance (%) – how far into the amplitude a sample must be before it counts as having settled into a state. 2 by default, the value IEEE Std 181-2003 uses. Samples between the two boundaries belong to no state and are treated as part of a transition.
- Mid Percent Reference Level – the level whose crossing DATES
a transition, as a percentage of the amplitude. 50 by default, which is
the mid point IEEE Std 181-2003 uses and what MATLAB calls
MidPercentReferenceLevel. It must lie strictly between the tolerance and 100 minus it. - Pulse Polarity – which excursion counts as a pulse:
- positive – a pulse runs from a rising mid crossing to the next falling one. This is the default, and MATLAB's.
- negative – the mirror: from a falling crossing to the next rising one.
- Sampling Time (s) – zero or less inherits the solver's rate; a positive value runs the block at that period.
Code export
All ten targets: Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog and PLC Structured Text.
Every threshold is structural and is inlined into the comparisons at export time rather than exposed as a tunable parameter – they follow from the state levels and the percentages, and the emitted core carries the numbers rather than the percentages. Re-export after changing any of them.
⚠ The three HDL targets are simulation-only. They carry this
block's arithmetic in real rather than Q16.16, quantising only at
the port boundary, for a reason specific to what it measures: an instant is a
sample index plus a fraction, and a 16-bit integer part runs out after 32767
samples – five and a half minutes at a 10 ms rate. The comparisons and the
interpolation are exact in real, which is what makes the exported
core agree with the simulation; a synthesizable variant would have to carry the
index some other way and is not what this block offers.
Simulink bridge
No equivalent (Support::None). Measured rather than
assumed: a find_system sweep over 22 DSP System Toolbox and
Simulink libraries on R2026a finds no block matching duty, pulse,
rise, fall, slew, overshoot, settling or
state level – the whole Pulse Metrics group is MATLAB functions with
no Simulink counterpart. The bridge reports this block rather than dropping it
silently, and it therefore has no parity testbench. Code export
verification still covers it across all ten languages.
Notes
- Stateful, and discrete by nature
(
setDiscreteOnlyBlock(true)): the tracker advances once per sample. - A measurement appears one sample after the transition that produced it, in the live run and in all ten exported languages alike. A hardware block cannot read back a value it computes in the same clocked interval, so publishing immediately would put the three HDL targets one sample behind the other seven on every edge; the delay is uniform instead, and deliberate.
- Crossing instants are interpolated between the two samples that straddle a reference level, exactly as IEEE Std 181-2003 Sec 5.3.3.2 specifies and MATLAB implements – so a measurement is not quantised to the sampling period.
- The output is 0 until the first measurement exists, and holds its last value between them. A run that never settles into both states produces no transitions and the output stays at 0.
- The state levels are PARAMETERS here, not estimated from the data.
MATLAB's pulse-metric functions call
statelevelsto guess the two levels from a histogram of the WHOLE signal when you do not supply them; that is a batch operation over samples a streaming block has not seen yet. This block takes the levels the way those same functions do when you pass'StateLevels'explicitly. - Scalar only. One waveform and its own tracker; wire one block per channel.
- No state space. The block is not linear in its input – it is a sequence of comparisons – so it carries none and model reduction correctly declines to merge it.
- A period needs three transitions – open, close, open again – so it starts reporting one full pulse later than Pulse Width does on the same waveform.
Code facts#
| Fact | Value |
|---|---|
| registered type | Control_Systems/Pulse_Metrics/Pulse_Period |
| family | Control_Systems/Pulse_Metrics |
| solver environment class | ICoreBlock_0_Control_Systems_1_Pulse_Metrics_2_Pulse_Period |
| source | src/ICoreBlocks/ICoreBlockLibrary/Blocks/Control_Systems/Pulse_Metrics/Pulse_Period/ICoreBlock_0_Control_Systems_1_Pulse_Metrics_2_Pulse_Period.cpp |
| header | src/ICoreBlocks/ICoreBlockLibrary/Blocks/Control_Systems/Pulse_Metrics/Pulse_Period/ICoreBlock_0_Control_Systems_1_Pulse_Metrics_2_Pulse_Period.h |
| default size on canvas | 132 × 72 px |
| ports at insert | 1 in, 1 out |
| code generators implemented | Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text |
Ports#
| # | Direction | Signal type | Description label |
|---|---|---|---|
| 1 | in | ICoreDouble | u |
| 2 | out | ICoreDouble | p |
Ports the constructor creates. A block whose port list changes with its configuration adds or removes ports at load time; the count above is the one a freshly inserted block has.
Configuration variables#
| Config variable | Default | Simulink parameter |
|---|---|---|
Low State Level | 0 | — |
High State Level | 1 | — |
State Level Tolerance (%) | 2 | — |
Mid Percent Reference Level | 50 | — |
Pulse Polarity | positive%~%negative~~positive | — |
Every block also carries Sampling Time (s) from ICoreBlockSolverEnvironment: zero or less inherits the solver's rate, a positive value runs the block at that period.
Simulink bridge#
| support | Support::None |
| Simulink path | — |
| port-count rule | PortsParam::None |
SampleTime parameter | yes |
Caveat (shown to the user): no Simulink equivalent: the Signal Processing Toolbox's pulse metrics are MATLAB functions and that toolbox ships no Simulink library at all. Measured 2026-09-10 on R2026a -- a find_system sweep over 22 DSP System Toolbox and Simulink libraries finds nothing matching pulse, rise, fall, slew, duty, overshoot, settling or state level. Reported rather than dropped, and it carries no parity testbench
Catalog contract: src/ICoreBlocks/ICoreCoder/ICoreCommandSystem/SimulinkBridge/ICoreSimulinkBlockCatalog.h
Description vs code#
The lists agree. check_block_descriptions.py finds no disagreement between the description's Ports, Parameters, Code export and Simulink bridge lists and the code's.
The verdict above is
tools/docs/check_block_descriptions.py(P7.1), which compares LISTS. It cannot read a sentence: "stateless" on a block with a state, an initial-value semantic the recursion does not implement, a "not synthesizable" caveat the HDL banner contradicts. That is the agent audit (P7.3) on BLOCK_DESCRIPTION_AUDIT.md, and this tool's green is not a substitute for one.
File banner (developer view)#
The top comment of the block's .cpp — the maths, the realization and the export strategy, addressed to whoever changes it. It must not contradict the description above (P7.5).
Pulse Period -- one readout of the shared Pulse Metrics tracker This block is one READOUT of the family's shared IEEE Std 181-2003 transition tracker. The tracker, the reference levels, the interpolation and all ten code emitters live in ../ICorePulseMetricsSupport.h, whose banner carries the algorithm and the five facts about MATLAB's own implementation that a paraphrase gets wrong. What is HERE is the block's ports, its parameters, and what it does with a transition once the tracker has dated one.
The state levels are PARAMETERS rather than estimated from the data. MATLAB guesses them with a histogram of the whole signal when they are not supplied; that is a batch operation over samples a streaming block has not seen, so this family takes them the way those same functions do when a caller passes 'StateLevels' explicitly.
A measurement is published ONE SAMPLE after the transition that produced it, in the live run and in all ten exported languages. A clocked hardware body cannot read back a value it writes in the same interval, so publishing immediately would put the three HDL targets one sample behind the other seven on every edge -- which export verification scores as the full size of the step. The delay is uniform instead.
Sample results#
The same rig also ran:
| Stimulus | What it is | Output range |
|---|---|---|
impulse | Impulse: one sample of 1 at k = 5, 0 elsewhere (Repeating Sequence Stair) | 0 … 0 |
ramp | Ramp: slope 1 from t = 0 | 0 … 0 |
sine | Sine Wave: amplitude 1, 2 rad/s, no phase, no bias | 0 … 3.141 |
table | Repeating Sequence Stair: [-2 -1 -0.5 0 0.5 1 2 3], one entry per sample | 0 … 0.8 |
Plotted: step — Step: 0 -> 1 at t = 1 s
Category dynamic · sample time 0.1 · 60 steps · commit 79aca7c97 · produced by docsSample --out <folder> --blocks Pulse_Metrics --steps 60 · data docs/generated/samples/Control_Systems__Pulse_Metrics__Pulse_Period.json · the SVG is generated from those numbers by tools/docs/plot_svg.py, so it is a run and not a drawing (R-D10).