Sine — Control Systems/Lookup Tables

Sine

Control Systems / Lookup Tables

Computes y = sin(2πu) from a quarter-wave lookup table in 16-bit fixed point – the same approximation Simulink's Sine block makes, not a call to sin().

This block is an approximation by design. Its output is quantized to multiples of 2⁻¹⁴ and lands roughly 6×10⁻⁵ from the true sine. That is the point of it: a table and a few adds are far cheaper on a fixed-point target than a series expansion. If you want true sine, use Trigonometric Function instead.

Note the argument is in cycles, not radians: u = 1 is one full period.

Ports

• Input – the phase u in cycles, of any size [m,n]. Any value is accepted; the phase wraps, so u and u+1 give the same output.
• Output – the approximated sine y, of the SAME size [m,n], always in [−1, 1] and always a multiple of 2⁻¹⁴.

Parameters

• Number Of Data Points – how many points the quarter-wave table holds, and therefore the accuracy. Defaults to 33, as in Simulink. More points mean a finer table and a smaller error between the points; it does not change the 2⁻¹⁴ output step, which is set by the 16-bit word and is the floor on accuracy however large the table gets. At least two.
• Sampling Time (s) – zero or less inherits the solver's rate; a positive value runs the block at that period.

How the value is produced

The phase is cast to a multiple of 2⁻¹⁶ and wrapped into one period; the quarter with the same magnitude is found by symmetry; the table is read and linearly interpolated there; and the result is truncated to the 2⁻¹⁴ grid before the sign is put back. Each of those steps is Simulink's, and reproducing them is what makes this block match it rather than merely resemble it – verified against the R2026a block to zero mismatches over 644 samples at three different table sizes.

Code export

All ten targets: Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog and PLC Structured Text. The table is baked in at export time: its size decides how many branches the generated code has, so it cannot be a tunable parameter.

The three HDL targets are not simulation-only, and they are the case this block was shaped for: the arithmetic is adds, one multiply per branch, and shifts, with no divider and no transcendental function anywhere. The Q16.16 datapath even matches the block's own 2⁻¹⁶ input cast exactly, so the HDL cores agree with the software ones rather than approximating them.

Simulink bridge

Import and export, mapped to simulink/Lookup Tables/Sine. "Number Of Data Points" to NumDataPoints as a plain pass-through value. The block always writes Formula = sin(2*pi*u) and OutputWordLength = 16, which is what this block is.

This Simulink block has no SampleTime parameter (verified against the R2026a dialog), so the rate stays on the ICore side and a block configured with an explicit positive rate reports that it did not cross. Simulink's other two formulas – exp(j*2*pi*u) and the combined sine-and-cosine – are complex or two-output and have no counterpart here; see Cosine for the other real one.

Notes

• Algebraic, with no state.
• Elementwise: the output carries the input's size.
• Not linear, and so deliberately carries no state space.
• See Cosine for the same table a quarter period earlier.