Varying 2DOF PID — Control Systems/Linear Parameter Varying

Varying 2DOF PID

Control Systems / Linear Parameter Varying

A two-degree-of-freedom continuous-time PID controller with a filtered derivative whose six parameters – the gains P, I, D, N and both setpoint weights b and c – arrive as signals, so the controller may be re-scheduled at any instant. It takes the reference r and the measurement y on separate ports rather than a pre-formed error, which is what lets the weights route the reference into the three branches independently:

e_P = b·r − y,   e_I = r − y,   e_D = c·r − y

dTerm = N·( D·e_D − x_F )
Parallel:  u = P·e_P + x_I + dTerm
Ideal:     u = P·( e_P + x_I + dTerm )
dx_I/dt = I·e_I
dx_F/dt = dTerm

b = c = 1 collapses the block to Varying PID Controller. The point of the block is b < 1, which softens the proportional kick on a setpoint step without touching the disturbance response, and c = 0, which removes derivative kick entirely. The output reads the states before the update, and the update consumes the same dTerm the output used.

Ports

• r – the reference / setpoint, of any size [p,q].
• y – the measurement, the same size as r. The controller is SISO and is applied independently to every entry, each carrying its own x_I and x_F.
• P – the proportional gain at this instant, a scalar shared by every entry.
• I – the integral gain at this instant, a scalar.
• D – the derivative gain at this instant, a scalar. Zero removes the derivative action, whatever N is.
• N – the derivative filter bandwidth at this instant, a scalar. The filter pole is at −N – see the Notes.
• b – the proportional setpoint weight at this instant, a scalar.
• c – the derivative setpoint weight at this instant, a scalar.
• Output – u, the same size as r.

The port order is Simulink's own: (r, y, P, I, D, N, b, c).

Parameters

• Controller Form – how P enters the sum:
  • Parallel – P, I and D are independent gains on the three branches, so the reference feedthrough is P·b + N·D·c.
  • Ideal – P multiplies the whole controller, so it scales the integral and derivative action and the setpoint-weighted proportional term: the reference feedthrough becomes P·(b + N·D·c).
• Initial Condition (Integrator) – the integrator accumulator at the start of the run, a scalar used for every entry. The I gain sits before the integrator, so this is the initial value of the integral term.
• Initial Condition (Filter) – the derivative filter's accumulator at the start of the run, a scalar used for every entry. Because the filter method is pinned to Forward Euler (see Notes), it is expressed in exactly the same units Simulink expresses it in, with no conversion on either side.
• Sampling Time (s) – zero or less inherits the solver's rate; a positive value runs the block at that period. Under a continuous solver the states are integrated and the rate is only a schedule; under a discrete solver, and in every exported core, it is the step of the forward-Euler update.

Everything else about the controller arrives on ports.

Code export

All ten targets: Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog and PLC Structured Text. The six parameters are emitted as reads of their signals rather than as constants, so a generated core re-schedules with them exactly as the simulation does; the only literals baked in are the sampling period, the chosen form and the two initial conditions.

A time-varying system cannot be pre-discretized, so the cores integrate with forward Euler on the parameters they read each step rather than with a baked-in ZOH. The block's own discrete-solver path takes the identical step, which is why the two agree exactly instead of to O(T_s).

The three HDL targets carry the recursion in Q16.16 fixed point, which is possible only because the methods are pinned: any other choice would put a division by 1 + N·c_F inside the loop. Verilog and SystemVerilog round rather than truncate when bringing an accumulator increment back down, since T_s·I·e_I is small against one Q16.16 quantum and a truncation would bias every step the same way.

Simulink bridge

Import and export, mapped to cstblocks/Linear Parameter Varying/Varying 2DOF PID (the library is cstblocks, not the "Control System Toolbox" display name, which add_block does not accept). "Controller Form" to Form (a 1:1 and therefore lossless pair), "Initial Condition (Integrator)" to InitialConditionForIntegrator and "Initial Condition (Filter)" to InitialConditionForFilter. The six parameters need no mapping at all – on both sides they are signals, so Simulink's own b and c parameters are inert here – and the port order is identical.

"Sampling Time (s)" crosses as SampleTime, under the standard name. That is worth stating because it is the exception in this family: every other Linear Parameter Varying block calls its rate Ts, and the continuous State Space and Observer Form blocks carry no rate parameter at all. This one does, because underneath it is the stock PID Controller (2DOF) with ControllerParametersSource = external, which is what moves the six parameters onto ports.

Thirteen further Simulink parameters are always implied, with no config behind them: ControllerParametersSource = external, TimeDomain = Continuous-time, Controller = PID, IntegratorMethod = Forward Euler, FilterMethod = Forward Euler, UseFilter = on, InitialConditionSource = internal, UseExternalDerivativeSource = off, UseKiTs = off, LimitOutput = off, AntiWindupMode = none, ExternalReset = none and TrackingMode = off. Every one of them either defines the block as the varying one rather than the stock one, or would add an input port in Simulink that no config value here can add.

Notes

• Continuous and stateful: two integrator states per entry of r. Under a discrete solver, and in every exported core, they step with forward Euler.
• The two discretization methods are pinned to Forward Euler. On a continuous controller that is no restriction of the math – continuous integration is exactly c_I = c_F = 0 – but it does pin the two Simulink parameters. The alternatives divide by 1 + N·c_F inside the loop, which a varying N cannot fold away at export time, and they make the filter initial condition ambiguous – Simulink scales it by N·T_s/(1 + N·c_F), and there is no single N to use. At Forward Euler that scale is exactly 1. Use Discrete PID Controller for the other eight integrator × filter combinations, with constant gains.
• Stability is the user's responsibility. The filter pole is at −N, so a negative N makes x_F grow – and under a discrete solver the pole is 1 − T_s·N, so N must additionally stay below 2/T_s. Nothing here can prevent it: and nothing here can prevent it: N is a signal and its trajectory is not known until the run.
• Integrator wind-up is not limited – the same behaviour Simulink's block has with LimitOutput off.
• Being time-varying, the block carries no state space and the model reduction and linear-analysis commands correctly refuse it. Use PID Controller (2DOF) when the parameters are constant.
• The discrete counterpart is Discrete Varying 2DOF PID, and the one-degree-of-freedom sibling is Varying PID Controller.