Discrete Nonlinear State Space — Control Systems/Discrete
Control_Systems/Discrete/Discrete_Nonlinear_State_Space · 2 input / 1 output port(s) at insert · exports to Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text
Description#
The block's own DESCRIPTION_HTML, rendered verbatim — the same text the config dialog's info panel and the library navigator show. Fix a wrong sentence in the block's .cpp (R-D9), never here.
Discrete Nonlinear State Space
Control Systems / Discrete
A discrete-time state space with a second, separately weighted input channel for a nonlinear term:
x[k+1] = A·x[k] + Bu·u[k] + Bf·f[k]
y[k] = C·x[k] + Du·u[k] + Df·f[k]
The nonlinearity is not written here: f arrives on its own port, so anything you can build on the canvas can drive it. The matrices it runs can be typed in directly, or derived by discretizing a continuous system.
Ports
- u – the linear input vector, [m,1].
- f – the nonlinear term, evaluated outside the block.
- y – the output vector, [p,1], sized from the C in force.
Parameters
- Discretization Method – decides which set of matrices runs: Same as Global Solver discretizes the continuous set with the model's solver method; Manually Load Discrete Parameters uses the discrete set as typed; the named methods (Zero-order Hold, First-order Hold, Impulse, Tustin, Matched, Backward Euler, Forward Euler) discretize with that method regardless of the solver.
- A/Bu/Bf/C/Du/Df - Continues – the continuous system, used by every method except direct load.
- A/Bu/Bf/C/Du/Df - Discrete – the discrete system, used only by direct load.
- Initial State Vector – x at the start of the run, [n,1].
- Sampling Time (s) – the update period, and the step the discretization is performed at. Zero or less inherits the solver's rate.
Code export
All ten targets: Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog and PLC Structured Text. Whichever matrices the discretization method selects are the ones baked into the generated recursion.
Simulink bridge
Neither direction. A nonlinear f/h state space has no Simulink library primitive to map onto, so the bridge reports this block with that reason instead of silently dropping it.
Notes
- Discrete only: the block never integrates, it steps.
Code facts#
| Fact | Value |
|---|---|
| registered type | Control_Systems/Discrete/Discrete_Nonlinear_State_Space |
| family | Control_Systems/Discrete |
| solver environment class | ICoreBlock_0_Control_Systems_1_Discrete_2_Discrete_Nonlinear_State_Space |
| source | src/ICoreSDK/ICoreBlockLibrary/Blocks/Control_Systems/Discrete/Discrete_Nonlinear_State_Space/ICoreBlock_0_Control_Systems_1_Discrete_2_Discrete_Nonlinear_State_Space.cpp |
| header | src/ICoreSDK/ICoreBlockLibrary/Blocks/Control_Systems/Discrete/Discrete_Nonlinear_State_Space/ICoreBlock_0_Control_Systems_1_Discrete_2_Discrete_Nonlinear_State_Space.h |
| default size on canvas | 130 × 90 px |
| ports at insert | 2 in, 1 out |
| code generators implemented | Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text |
Ports#
| # | Direction | Signal type | Description label |
|---|---|---|---|
| 1 | in | ICoreDouble | u |
| 2 | in | ICoreDouble | f |
| 3 | out | ICoreDouble | y |
Ports the constructor creates. A block whose port list changes with its configuration adds or removes ports at load time; the count above is the one a freshly inserted block has.
Configuration variables#
| Config variable | Default | Simulink parameter |
|---|---|---|
Discretization Method | Same as Global Solver%~%Manually Load Discrete Parameters… | — |
A - Continues | [0 1;-1 -1] | — |
Bu - Continues | [0; 1] | — |
Bf - Continues | [0; 0] | — |
C - Continues | [1 0] | — |
Du - Continues | [0] | — |
Df - Continues | [0] | — |
A - Discrete | [0 1;-0.1 -0.1] | — |
Bu - Discrete | [0; 0.1] | — |
Bf - Discrete | [0; 0] | — |
C - Discrete | [1 0] | — |
Du - Discrete | [0] | — |
Df - Discrete | [0] | — |
Initial State Vector | [0; 0] | — |
Every block also carries Sampling Time (s) from ICoreBlockSolverEnvironment: zero or less inherits the solver's rate, a positive value runs the block at that period.
Simulink bridge#
| support | Support::None |
| Simulink path | — |
| port-count rule | PortsParam::None |
SampleTime parameter | yes |
Caveat (shown to the user): nonlinear f/h state spaces have no Simulink library primitive
Catalog contract: src/ICoreSDK/ICoreCoder/ICoreCommandSystem/SimulinkBridge/ICoreSimulinkBlockCatalog.h
Description vs code#
⚠ Mismatch. Fixed at the source — the description or the code, whichever is wrong (R-D9) — never explained away on a docs page:
B5config variable 'A - Continues' is not documented under ParametersB5config variable 'Bu - Continues' is not documented under ParametersB5config variable 'Bf - Continues' is not documented under ParametersB5config variable 'C - Continues' is not documented under ParametersB5config variable 'Du - Continues' is not documented under ParametersB5config variable 'A - Discrete' is not documented under ParametersB5config variable 'Bu - Discrete' is not documented under ParametersB5config variable 'Bf - Discrete' is not documented under ParametersB5config variable 'C - Discrete' is not documented under ParametersB5config variable 'Du - Discrete' is not documented under Parameters
The verdict above is
tools/docs/check_block_descriptions.py(P7.1), which compares LISTS. It cannot read a sentence: "stateless" on a block with a state, an initial-value semantic the recursion does not implement, a "not synthesizable" caveat the HDL banner contradicts. That is the agent audit (P7.3) on BLOCK_DESCRIPTION_AUDIT.md, and this tool's green is not a substitute for one.
Sample results#
The same rig also ran:
| Stimulus | What it is | Output range |
|---|---|---|
impulse | Impulse: one sample of 1 at k = 5, 0 elsewhere (Repeating Sequence Stair) | -0.008902 … 0.05456 |
ramp | Ramp: slope 1 from t = 0 | 0 … 4.796 |
sine | Sine Wave: amplitude 1, 2 rad/s, no phase, no bias | -0.3034 … 0.4961 |
table | Repeating Sequence Stair: [-2 -1 -0.5 0 0.5 1 2 3], one entry per sample | -0.118 … 0.4753 |
Plotted: step — Step: 0 -> 1 at t = 1 s
Category dynamic · sample time 0.1 · 60 steps · commit ccf005c8 · produced by docsSample --out <folder> --steps 60 · data docs/generated/samples/Control_Systems__Discrete__Discrete_Nonlinear_State_Space.json · the SVG is generated from those numbers by tools/docs/plot_svg.py, so it is a run and not a drawing (R-D10).