Nonlinear State Space — Control Systems/Continues

Control_Systems/Continues/Nonlinear_State_Space · 2 input / 1 output port(s) at insert · exports to Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text

Description#

The block's own DESCRIPTION_HTML, rendered verbatim — the same text the config dialog's info panel and the library navigator show. Fix a wrong sentence in the block's .cpp (R-D9), never here.

Nonlinear State Space

Control Systems / Continues

A continuous-time state space with a second, separately weighted input channel for a nonlinear term:

dx/dt = A·x + Bu·u + Bf·f
y = C·x + Du·u + Df·f

The nonlinearity itself is not written here: f arrives on its own port, so any expression you can build on the canvas (a Python Code block, a gain chain, a feedback of y) can drive it.

Ports

u – the linear input vector, [m,1].
f – the nonlinear term, evaluated outside the block.
y – the output vector, [p,1], sized from C.

Parameters

A – state matrix [n,n].
Bu / Bf – how u and f enter the state equation.
C – output matrix [p,n].
Du / Df – direct feed-through of u and f.
Initial State Vector – x at the start of the run, [n,1].
Sampling Time (s) – zero or less inherits the solver's rate; a positive value runs the block at that period.

Code export

All ten targets: Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog and PLC Structured Text. A deployable target runs a discrete model, so the export carries this system discretized by the run's method and the generated code matches the in-app simulation.

Simulink bridge

Neither direction. A nonlinear f/h state space has no Simulink library primitive to map onto, so the bridge reports this block with that reason instead of silently dropping it.

Notes

Stateful and continuous: the solver integrates the state between steps.

Code facts#

Fact	Value
registered type	`Control_Systems/Continues/Nonlinear_State_Space`
family	`Control_Systems/Continues`
solver environment class	`ICoreBlock_0_Control_Systems_1_Continues_2_Nonlinear_State_Space`
source	`src/ICoreSDK/ICoreBlockLibrary/Blocks/Control_Systems/Continues/Nonlinear_State_Space/ICoreBlock_0_Control_Systems_1_Continues_2_Nonlinear_State_Space.cpp`
header	`src/ICoreSDK/ICoreBlockLibrary/Blocks/Control_Systems/Continues/Nonlinear_State_Space/ICoreBlock_0_Control_Systems_1_Continues_2_Nonlinear_State_Space.h`
default size on canvas	130 × 90 px
ports at insert	2 in, 1 out
code generators implemented	`Python`, `MATLAB`, `Java`, `Rust`, `C`, `C++`, `VHDL`, `Verilog`, `SystemVerilog`, `PLC Structured Text`

Ports#

#	Direction	Signal type	Description label
1	in	`ICoreDouble`	u
2	in	`ICoreDouble`	f
3	out	`ICoreDouble`	y

Ports the constructor creates. A block whose port list changes with its configuration adds or removes ports at load time; the count above is the one a freshly inserted block has.

Configuration variables#

Config variable	Default	Simulink parameter
`A`	`[0 1;-1 -1]`	—
`Bu`	`[0; 1]`	—
`Bf`	`[0; 1]`	—
`C`	`[1 0]`	—
`Du`	`[0]`	—
`Df`	`[0]`	—
`Initial State Vector`	`[0; 0]`	—

Every block also carries Sampling Time (s) from ICoreBlockSolverEnvironment: zero or less inherits the solver's rate, a positive value runs the block at that period.

Simulink bridge#


support	`Support::None`
Simulink path	—
port-count rule	`PortsParam::None`
`SampleTime` parameter	yes

Caveat (shown to the user): nonlinear f/h state spaces have no Simulink library primitive

Catalog contract: src/ICoreSDK/ICoreCoder/ICoreCommandSystem/SimulinkBridge/ICoreSimulinkBlockCatalog.h

Description vs code#

The lists agree. check_block_descriptions.py finds no disagreement between the description's Ports, Parameters, Code export and Simulink bridge lists and the code's.

The verdict above is tools/docs/check_block_descriptions.py (P7.1), which compares LISTS. It cannot read a sentence: "stateless" on a block with a state, an initial-value semantic the recursion does not implement, a "not synthesizable" caveat the HDL banner contradicts. That is the agent audit (P7.3) on BLOCK_DESCRIPTION_AUDIT.md, and this tool's green is not a substitute for one.

The top comment of the block's .cpp — the maths, the realization and the export strategy, addressed to whoever changes it. It must not contradict the description above (P7.5).

Continuous Nonlinear State Space block — muxed-input linear MIMO realization Two input ports: u (inputs) and f (external nonlinearities). The block is STILL LINEAR — both input sets are muxed, giving a multi-input linear system: dx/dt = A x + Bu u + Bf f, y = C x + Du u + Df f This is the standard trick to embed a class of nonlinear systems while keeping a linear block.

Simulation: compute_f/h(_discrete) run the recursion on the (muxed) state space directly. Code export: every generator realizes the SAME recursion, structurally identical to the in-app simulation, reading BOTH input ports and keeping Bu/Bf/Du/Df separate: y[k] = C x[k] + Du u[k] + Df f[k] (output from the CURRENT state) x[k+1] = A x[k] + Bu u[k] + Bf f[k] (state update) nlDiscreteExport() calls discretize() (targets run the discrete model), like the continuous State Space block, so the export matches the in-app sim for every discretization method.

Sample results#

The same rig also ran:

Stimulus	What it is	Output range
`impulse`	Impulse: one sample of 1 at k = 5, 0 elsewhere (Repeating Sequence Stair)	-0.01779 … 0.1092
`ramp`	Ramp: slope 1 from t = 0	0 … 9.694
`sine`	Sine Wave: amplitude 1, 2 rad/s, no phase, no bias	-0.6082 … 0.9932
`table`	Repeating Sequence Stair: [-2 -1 -0.5 0 0.5 1 2 3], one entry per sample	-0.324 … 0.9641

Plotted: step — Step: 0 -> 1 at t = 1 s

Category dynamic · sample time 0.1 · 60 steps · commit ccf005c8 · produced by docsSample --out <folder> --steps 60 · data docs/generated/samples/Control_Systems__Continues__Nonlinear_State_Space.json · the SVG is generated from those numbers by tools/docs/plot_svg.py, so it is a run and not a drawing (R-D10).

Nonlinear State Space — Control Systems/Continues

Description#