Recursive IIR Identification — System Identification/Recursive

Recursive IIR Identification

System Identification / Recursive

Identifies a discrete transfer function while the model runs, by recursive least squares. One sample of the input/output pair goes in per step, and the coefficient estimates come straight back out – so the identified model is available on the canvas, live, and can drive the rest of the diagram.

Ports

• u – the excitation signal, scalar.
• y – the measured response, scalar.
• Num / Den – the running coefficient estimates, updated every step and sized from the configured orders.

Parameters

• Numerator Order – the order of the identified numerator. It must not exceed the denominator order: the difference is the model's intrinsic input delay, and a negative one is not causal.
• Denominator Order – the order of the identified denominator, and so the model's order.
• Forgetting Factor – how fast old data is discounted, in (0,1]. 1 weighs every sample equally and settles on a fixed model; slightly below 1 (0.95–0.99) tracks a system that drifts, at the cost of a noisier estimate.
• Sampling Time (s) – the rate the estimator is updated at, and the rate the identified model belongs to. Zero or less inherits the solver's rate.

Notes

• Discrete only. The estimate needs a warm-up: until enough history has been seen, the outputs hold their initial values.
• Identification quality depends on the excitation – a signal that does not stir the dynamics cannot identify them.

Code export

All ten targets: Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog and PLC Structured Text. Every one re-implements the same recursion step for step – same regressor convention, same warm-up gate, same covariance update – with the orders, and so every array bound, fixed at export time, so the exported coefficients track the in-app ones sample for sample.

The three HDL targets are simulation-only: they carry the recursion in double arithmetic and quantize only on the way out to the fixed-point signal ports. The covariance spans roughly twelve decades and needs a division per step, neither of which the Q16.16 signal format can carry; a synthesizable fixed-point version would need its own scaled datapath.

Noncausal orders (numerator above denominator) are refused: each generator returns nothing so the export fails loudly for that language rather than emitting a recursion with a negative delay.

Simulink bridge

Neither direction. System identification blocks have no Simulink equivalent, so the bridge reports this block with that reason instead of silently dropping it.