GRU Cell — Machine Learning/Neural Networks
Machine_Learning/Neural_Networks/GRU_Cell · 1 input / 1 output port(s) at insert · exports to Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text
Description#
The block's own DESCRIPTION_HTML, rendered verbatim — the same text the config dialog's info panel and the library navigator show. Fix a wrong sentence in the block's .cpp (R-D9), never here.
GRU Cell
Machine Learning / Neural Networks
One gated recurrent step, evaluated at inference –
torch.nn.GRUCell with the trained weights pasted in:
r = σ(Wiru + bir + Whrh +
bhr)
z = σ(Wizu + biz + Whzh +
bhz)
n = tanh(Winu + bin + r · (Whnh +
bhn))
h' = (1 − z)·n + z·h
The gates are what let a GRU hold information over far more steps than a plain Simple RNN Cell: z decides how much of the old state to keep, and r decides how much of it the candidate is even allowed to see.
Ports
- u – the input sample, a column [m,1], where m is the number of COLUMNS of Input Weights.
- Output – h, a column [n,1]: the new hidden state, which is also this cell's output. n is the number of ROWS of Input Weights divided by three, because the three gates are stacked.
Parameters
- Input Weights – [3n,m], the three input matrices
stacked r, then z, then n. This is exactly
cell.weight_ih's layout, so it pastes in without splitting. - Recurrent Weights – [3n,n], stacked the same way
(
cell.weight_hh). - Input Bias – [3n,1], stacked
(
cell.bias_ih). - Recurrent Bias – [3n,1], stacked
(
cell.bias_hh). Keep this separate from Input Bias – do not add them together. See Notes: the candidate's recurrent bias sits inside the reset-gate multiply. - Initial Hidden State – [n,1], where the recurrence starts, re-applied at the start of every run.
- Sampling Time (s) – zero or less inherits the solver's rate; a positive value runs the block at that period. Being discrete-only, a non-positive value falls back to the model's global sampling time.
Code export
All ten targets: Python, MATLAB, Java, Rust,
C, C++, VHDL, Verilog, SystemVerilog and
PLC Structured Text. Every weight is baked in at full
setprecision(17), and each backend carries the hidden state in its
own persistent form seeded with Initial Hidden State.
The three HDL targets are simulation-only: sigmoid and tanh are
transcendental. PLC Structured Text has no TANH, so tanh is emitted
through 2 ÷ (1 + EXP(−2z)) − 1.
Simulink bridge
None. Simulink's recurrent layers live inside its Deep Learning
blocks, which take a trained network object rather than weight matrices,
and no config value can carry an object across the bridge. The bridge reports
the block rather than dropping it silently, and it has no parity
testbench, which is the documented consequence of
Support::None.
Notes
- Why two bias vectors and not their sum. In the r and z gates the two
biases are only ever added, so they could be folded. In the candidate
they cannot: bhn is inside the reset multiply and
bin is outside it, so folding them changes the answer whenever
r ≠ 1. That is PyTorch's and cuDNN's convention and Keras'
reset_after=Truedefault. Simple RNN Cell asks for the sum precisely because there the distinction does not exist. - Stateful and discrete by nature, so the block declares itself discrete-only: a network step has no derivative to integrate.
- No state space: the gates are nonlinear, so no A/B/C/D describes the recurrence and model reduction correctly refuses the block.
- The state is read before it is written. h' depends on every element of h, so the generated code builds the whole new vector before storing any of it – except on the three HDL targets, where the state is a registered signal and pre-clock reads give this for free.
Code facts#
| Fact | Value |
|---|---|
| registered type | Machine_Learning/Neural_Networks/GRU_Cell |
| family | Machine_Learning/Neural_Networks |
| solver environment class | ICoreBlock_0_Machine_Learning_1_Neural_Networks_2_GRU_Cell |
| source | src/ICoreSDK/ICoreBlockLibrary/Blocks/Machine_Learning/Neural_Networks/GRU_Cell/ICoreBlock_0_Machine_Learning_1_Neural_Networks_2_GRU_Cell.cpp |
| header | src/ICoreSDK/ICoreBlockLibrary/Blocks/Machine_Learning/Neural_Networks/GRU_Cell/ICoreBlock_0_Machine_Learning_1_Neural_Networks_2_GRU_Cell.h |
| default size on canvas | 126 × 88 px |
| ports at insert | 1 in, 1 out |
| code generators implemented | Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text |
Ports#
| # | Direction | Signal type | Description label |
|---|---|---|---|
| 1 | in | ICoreDouble | u |
| 2 | out | ICoreDouble | h |
Ports the constructor creates. A block whose port list changes with its configuration adds or removes ports at load time; the count above is the one a freshly inserted block has.
Configuration variables#
| Config variable | Default | Simulink parameter |
|---|---|---|
Input Weights | [0.5 -0.3 0.2; 0.4 0.15 -0.25; -0.35 0.45 0.1; 0.2 -0.5 0… | — |
Recurrent Weights | [0.3 -0.2; 0.25 0.4; -0.1 0.35; 0.45 -0.3; 0.2 0.5; -0.4 … | — |
Input Bias | [0.05; -0.1; 0.15; -0.05; 0.2; -0.15] | — |
Recurrent Bias | [-0.1; 0.05; -0.2; 0.1; -0.05; 0.25] | — |
Initial Hidden State | [0; 0] | — |
Every block also carries Sampling Time (s) from ICoreBlockSolverEnvironment: zero or less inherits the solver's rate, a positive value runs the block at that period.
Simulink bridge#
| support | Support::None |
| Simulink path | — |
| port-count rule | PortsParam::None |
SampleTime parameter | yes |
Caveat (shown to the user): no Simulink equivalent that could carry the weights: its recurrent layers exist only inside the Deep Learning blocks, which take a trained network OBJECT rather than weight matrices, and no config value crosses the bridge as an object
Catalog contract: src/ICoreSDK/ICoreCoder/ICoreCommandSystem/SimulinkBridge/ICoreSimulinkBlockCatalog.h
Description vs code#
The checker has a blind spot here — it could not resolve something (a grouped port bullet, a computed config name), which is reported and never counted as a pass. A reader has to settle it:
B0every stimulus in the sample errored — cross-checks skipped
The verdict above is
tools/docs/check_block_descriptions.py(P7.1), which compares LISTS. It cannot read a sentence: "stateless" on a block with a state, an initial-value semantic the recursion does not implement, a "not synthesizable" caveat the HDL banner contradicts. That is the agent audit (P7.3) on BLOCK_DESCRIPTION_AUDIT.md, and this tool's green is not a substitute for one.
File banner (developer view)#
The top comment of the block's .cpp — the maths, the realization and the export strategy, addressed to whoever changes it. It must not contradict the description above (P7.5).
GRU Cell — a gated recurrent step, and Simple_RNN_Cell's state plumbing with three gates r = sigmoid( Wir*u + bir + Whr*h + bhr ) z = sigmoid( Wiz*u + biz + Whz*h + bhz ) n = tanh ( Win*u + bin + r * (Whn*h + bhn) ) h' = (1 - z) * n + z * h
See the header for the one thing here that is NOT guessable: the reset gate multiplies (Whn*h + bhn) with the bias INSIDE, which is why this block takes two bias vectors where Simple_RNN_Cell takes their sum.
Every backend emits the same shape: read the persistent state, build r, z, n and then the whole new h from it, and only then store. The three HDL targets are SIMULATION-ONLY
real(sigmoid and tanh); PLC ST has no TANH and uses the EXP identity.
Sample results#
No stimulus produced a sampled output in this rig — Invalid input size at: ICore Blocks/Home/GRU Cell. That is a fact about the single-block rig, not a verdict on the block: an offline batch fit, a block whose output only appears at onSolverFinish, or one that needs a driven environment cannot be exercised alone.
Category unsampled · sample time 0.1 · 60 steps · commit ccf005c8 · produced by docsSample --out <folder> --steps 60
Sample data: docs/generated/samples/Machine_Learning__Neural_Networks__GRU_Cell.json