Generated reference › Conv 2D — Machine Learning/Neural Networks
kind: generated#block#machine-learning-neural-networks

Conv 2D — Machine Learning/Neural Networks

Machine_Learning/Neural_Networks/Conv_2D · 1 input / 1 output port(s) at insert · exports to Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text

Description#

The block's own DESCRIPTION_HTML, rendered verbatim — the same text the config dialog's info panel and the library navigator show. Fix a wrong sentence in the block's .cpp (R-D9), never here.

Conv 2D

Machine Learning / Neural Networks

Slides one kernel over the input matrix in both axes:

ya,b = B + Σi Σj Wi,j · uaSR+iDR−PR, bSC+jDC−PC, with u read as 0 outside the matrix, and Rout = ⌊(R + 2PR − spanR) ÷ SR⌋ + 1, Cout = ⌊(C + 2PC − spanC) ÷ SC⌋ + 1, where spanR = (KR−1)DR + 1 and spanC = (KC−1)DC + 1

The front end of any 2-D CNN: an image, a spectrogram, or any grid of features a convolution is meant to scan. It is Conv 1D in both axes, and it pairs with Pooling 2D exactly as Conv 1D pairs with Pooling 1D.

This is cross-correlation – the kernel is not reversed, and it is not transposed – which is what torch.nn.Conv2d and Keras Conv2D compute under the name convolution. A trained kernel pastes straight into the config.

Ports

  • u – the grid, any matrix [R,C]. R + 2PR must be at least the kernel's row span and C + 2PC at least its column span, or there is no complete window and the block is reported.
  • Outputy, a matrix [Rout,Cout] as above. The block resizes its output when the input size or any of the geometry changes, so a downstream block sees the new shape.

Parameters

  • KernelW, the [KR,KC] filter taps, in grid order (row 0 is the top of the window). layer.weight[0][0] for a single-channel PyTorch Conv2d. The kernel need not be square, and the block is single channel: one kernel, one input matrix, one output matrix.
  • BiasB, one scalar added to every output cell. Use 0 for a layer trained with bias=False.
  • Row Stride / Column StrideSR, SC, how far the window advances per output down and across; whole numbers ≥ 1.
  • Row Padding / Column PaddingPR, PC, how many implicit zeros are placed at each end of that axis; whole numbers ≥ 0. P = (span−1)/2 with a stride of 1 is the "same" padding that keeps the output the size of the input.
  • Row Dilation / Column DilationDR, DC, the gap between taps along that axis; whole numbers ≥ 1. D = 1 is an ordinary convolution; larger values spread the same taps over a wider span without adding parameters.
  • Sampling Time (s) – zero or less inherits the solver's rate; a positive value runs the block at that period.

Code export

All ten targets: Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog and PLC Structured Text. Every window is unrolled at export time, and each tap that falls in the padding of either axis is resolved to a literal zero and dropped from the emitted expression rather than guarded at run time – so the generated code contains no bounds check anywhere. The kernel and bias are baked in at full setprecision(17); there is no tunable parameter, because a trained tap is not something to retune on the target.

The three HDL targets are ordinary Q16.16 fixed point and are offered for synthesis: the whole block is multiply-accumulate, with no transcendental and no division. Note that an unrolled 2-D convolution emits KR·KC products per output cell, so a large kernel over a large grid is a large amount of straight-line hardware.

Simulink bridge

None. Simulink's convolution layers live inside its Deep Learning blocks, which take a trained network object rather than a kernel, and no config value can carry an object across the bridge. (2-D FIR Filter in DSP System Toolbox performs the same arithmetic, but it is a filter over an image rather than a layer, and it does not carry a bias, a dilation or a per-axis stride.) The bridge reports the block rather than dropping it silently, and it has no parity testbench, which is the documented consequence of Support::None rather than a gap.

Notes

  • Algebraic and stateless: the whole window comes from the current input matrix, not from past samples. This convolves across the grid, not across time.
  • Linear in u, but it deliberately carries no state space: an [RoutCout, RC] feed-through matrix is not what ICoreStateSpace's merge rules are for, and model reduction requires a SISO form this block does not have.
  • Single channel. A multi-channel convolution would need a [Cout,Cin,KR,KC] weight tensor, which a two-dimensional config cannot carry without a flattening convention this block does not define.
  • The tail is dropped in each axis independently, exactly as in every framework: if (R + 2PR − spanR) is not a multiple of SR, the rows past the last complete window are not read, and likewise for the columns.

Code facts#

FactValue
registered typeMachine_Learning/Neural_Networks/Conv_2D
familyMachine_Learning/Neural_Networks
solver environment classICoreBlock_0_Machine_Learning_1_Neural_Networks_2_Conv_2D
sourcesrc/ICoreSDK/ICoreBlockLibrary/Blocks/Machine_Learning/Neural_Networks/Conv_2D/ICoreBlock_0_Machine_Learning_1_Neural_Networks_2_Conv_2D.cpp
headersrc/ICoreSDK/ICoreBlockLibrary/Blocks/Machine_Learning/Neural_Networks/Conv_2D/ICoreBlock_0_Machine_Learning_1_Neural_Networks_2_Conv_2D.h
default size on canvas120 × 84 px
ports at insert1 in, 1 out
code generators implementedPython, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text

Ports#

#DirectionSignal typeDescription label
1inICoreDoubleu
2outICoreDoubley

Ports the constructor creates. A block whose port list changes with its configuration adds or removes ports at load time; the count above is the one a freshly inserted block has.

Configuration variables#

Config variableDefaultSimulink parameter
Kernel[0.6 -0.25; 0.9 0.4]
Bias0.1
Row Stride1
Column Stride1
Row Padding0
Column Padding0
Row Dilation1
Column Dilation1

Every block also carries Sampling Time (s) from ICoreBlockSolverEnvironment: zero or less inherits the solver's rate, a positive value runs the block at that period.

supportSupport::None
Simulink path
port-count rulePortsParam::None
SampleTime parameteryes

Caveat (shown to the user): no Simulink equivalent as a signal block: its convolution layers exist only inside the Deep Learning blocks, which take a trained network OBJECT rather than a kernel. DSP System Toolbox's 2-D FIR Filter performs the same arithmetic but is a filter over an image rather than a layer -- no bias, no dilation and no per-axis stride -- so it is not this block either

Catalog contract: src/ICoreSDK/ICoreCoder/ICoreCommandSystem/SimulinkBridge/ICoreSimulinkBlockCatalog.h

Description vs code#

The checker has a blind spot here — it could not resolve something (a grouped port bullet, a computed config name), which is reported and never counted as a pass. A reader has to settle it:

  • B0 every stimulus in the sample errored — cross-checks skipped

The verdict above is tools/docs/check_block_descriptions.py (P7.1), which compares LISTS. It cannot read a sentence: "stateless" on a block with a state, an initial-value semantic the recursion does not implement, a "not synthesizable" caveat the HDL banner contradicts. That is the agent audit (P7.3) on BLOCK_DESCRIPTION_AUDIT.md, and this tool's green is not a substitute for one.

File banner (developer view)#

The top comment of the block's .cpp — the maths, the realization and the export strategy, addressed to whoever changes it. It must not contradict the description above (P7.5).

Conv 2D — single-channel cross-correlation over a matrix, per-axis stride, padding, dilation y[a][b] = B + sum_i sum_j W[i][j] * u[a*SR + i*DR - PR][b*SC + j*DC - PC] u read as 0 outside the matrix

Conv_1D's arithmetic in both axes, over Pooling_2D's indexing. Fully UNROLLED at export time: R, C, the kernel shape and all six counts are known once the model is built, so every tap that falls in the padding is resolved to a literal 0 and DROPPED from the emitted expression rather than guarded at run time. No backend emits a loop bound, an index type or a bounds check.

The three HDL targets are genuine Q16.16: this is multiply-accumulate and nothing else.

Sample results#

No stimulus produced a sampled output in this rig — Kernel span larger than the padded signal at: ICore Blocks/Home/Conv 2D. That is a fact about the single-block rig, not a verdict on the block: an offline batch fit, a block whose output only appears at onSolverFinish, or one that needs a driven environment cannot be exercised alone.

Category unsampled · sample time 0.1 · 60 steps · commit ccf005c8 · produced by docsSample --out <folder> --steps 60

Sample data: docs/generated/samples/Machine_Learning__Neural_Networks__Conv_2D.json