Conv 1D — Machine Learning/Neural Networks
Machine_Learning/Neural_Networks/Conv_1D · 1 input / 1 output port(s) at insert · exports to Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text
Description#
The block's own DESCRIPTION_HTML, rendered verbatim — the same text the config dialog's info panel and the library navigator show. Fix a wrong sentence in the block's .cpp (R-D9), never here.
Conv 1D
Machine Learning / Neural Networks
Slides a bank of kernels along the input channels:
yi,co = bco + Σci Σj wn(co,ci),j · uiS + jD − P, ci, with u read as 0 outside the signal, and Lout = ⌊(L + 2P − span) ÷ S⌋ + 1 where span = (K−1)D + 1
The front end of any 1-D CNN or temporal convolutional network. Stack several with Dilation 1, 2, 4, 8 and you have a TCN: the receptive field doubles per layer while the parameter count does not.
This is cross-correlation – the kernel is not reversed
– which is what torch.nn.Conv1d and Keras Conv1D
compute under the name convolution. A block that reversed it to be
mathematically pedantic would disagree with every set of trained weights you
paste in.
Ports
- u – the sequence, [L,Cin]: one column per input channel, L rows along the sequence. A plain [L,1] column is the single-channel case and needs no setting. Cin is read off the signal, so there is nothing to configure that could disagree with it. L + 2P must be at least the kernel's span, or there is no complete window and the block is reported.
- Output – y, [Lout,Cout], one column per output channel. The block resizes its output when L, Cin or any of the geometry changes, so a downstream block sees the new shape.
Parameters
- Kernel – w, a
[Cout·Cin, K] matrix: one row per
(output, input) channel pair, row n = co·Cin + ci,
each row carrying that pair's K taps in signal order. That is exactly
layer.weight.reshape(-1, K)for a PyTorchConv1d, so a trained tensor pastes in without being rearranged. In Depthwise there is no ci axis and it is [Cout, K].- A [K,1] column is also accepted, and only when Cout·Cin = 1: it is the same K taps written the other way round, it is the default, and it is what a project saved before this block was multi-channel loads as. With more than one channel pair a column is refused rather than reinterpreted – both readings would be possible, and the wrong one is a silently different network.
- Bias – b. Either a single value, added to every
output channel, or a [Cout,1] column, one per output channel.
Use 0 for a layer trained with
bias=False. - Output Channels – Cout, how many columns the output carries; a whole number ≥ 1, and 1 by default. In Depthwise it must be a positive multiple of Cin, and Cout/Cin is then PyTorch's channel multiplier.
- Channel Mode – whether the channels are mixed:
- Standard (sum across channels) – the ordinary convolution: every output channel sums over all Cin input channels. The default.
- Depthwise (one kernel per channel) – one kernel per input channel and
no sum across them, PyTorch's
groups = in_channels. Output channel co reads input channel co ÷ (Cout/Cin), which is PyTorch's own ordering. This is the depthwise half of a depthwise-separable convolution; the pointwise half is a second Conv 1D with K = 1.
- Stride – S, how far the window advances per output; a whole number ≥ 1.
- Padding – P, how many implicit zeros are placed at each end; a whole number ≥ 0. P = (span−1)/2 with S = 1 is the "same" padding that keeps Lout = L.
- Dilation – D, the gap between taps; a whole number ≥ 1. D = 1 is an ordinary convolution; larger values spread the same K taps over a wider span without adding parameters.
- Sampling Time (s) – zero or less inherits the solver's rate; a positive value runs the block at that period.
Code export
All ten targets: Python, MATLAB, Java, Rust,
C, C++, VHDL, Verilog, SystemVerilog and
PLC Structured Text. Every window is unrolled at export time, in
both the sequence and the channel axis, and each tap that falls in the padding is
resolved to a literal zero and dropped from the emitted expression rather
than guarded at run time – so the generated code contains no bounds check
anywhere. Depthwise emits fewer terms rather than a guarded loop: the
cross-channel products simply are not written. The kernel and bias are baked in
at full setprecision(17); there is no tunable parameter, because a
trained tap is not something to retune on the target.
The three HDL targets are ordinary Q16.16 fixed point and are offered for synthesis: the whole block is multiply-accumulate, with no transcendental and no division.
Simulink bridge
None. Simulink's convolution layers live inside its Deep Learning
blocks, which take a trained network object rather than a kernel, and no
config value can carry an object across the bridge.
(Discrete FIR Filter is a different thing: it filters along
time, one sample in and one out, where this slides along a vector within one
sample.) The bridge reports the block rather than dropping it silently, and it
has no parity testbench, which is the documented consequence of
Support::None rather than a gap.
Notes
- Algebraic and stateless: the whole window comes from the current input column, not from past samples. This convolves across the vector, not across time – for a filter over TIME use Discrete FIR Filter.
- Linear in u, but it deliberately carries no state space: an
[Lout,L] feed-through matrix is not what
ICoreStateSpace's merge rules are for, and model reduction requires a SISO form this block does not have. - Multi-channel, in both modes. The three-dimensional weight tensor is
carried by the [Cout·Cin, K] flattening
above, which is the convention this block defines and PyTorch's
reshapeproduces. Depthwise Conv 1D is the Depthwise setting of Channel Mode, not a second block; a dilated convolution is the Dilation setting, for the same reason. - The tail is dropped, exactly as in every framework: if (L + 2P − span) is not a multiple of S, the samples past the last complete window are not read.
Code facts#
| Fact | Value |
|---|---|
| registered type | Machine_Learning/Neural_Networks/Conv_1D |
| family | Machine_Learning/Neural_Networks |
| solver environment class | ICoreBlock_0_Machine_Learning_1_Neural_Networks_2_Conv_1D |
| source | src/ICoreBlocks/ICoreBlockLibrary/Blocks/Machine_Learning/Neural_Networks/Conv_1D/ICoreBlock_0_Machine_Learning_1_Neural_Networks_2_Conv_1D.cpp |
| header | src/ICoreBlocks/ICoreBlockLibrary/Blocks/Machine_Learning/Neural_Networks/Conv_1D/ICoreBlock_0_Machine_Learning_1_Neural_Networks_2_Conv_1D.h |
| default size on canvas | 120 × 80 px |
| ports at insert | 1 in, 1 out |
| code generators implemented | Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text |
Ports#
| # | Direction | Signal type | Description label |
|---|---|---|---|
| 1 | in | ICoreDouble | u |
| 2 | out | ICoreDouble | y |
Ports the constructor creates. A block whose port list changes with its configuration adds or removes ports at load time; the count above is the one a freshly inserted block has.
Configuration variables#
| Config variable | Default | Simulink parameter |
|---|---|---|
Kernel | [0.6; -0.25; 0.9] | — |
Bias | 0.1 | — |
Stride | 1 | — |
Padding | 0 | — |
Dilation | 1 | — |
Output Channels | 1 | — |
Channel Mode | Standard (sum across channels)%~%Depthwise (one kernel pe… | — |
Every block also carries Sampling Time (s) from ICoreBlockSolverEnvironment: zero or less inherits the solver's rate, a positive value runs the block at that period.
Simulink bridge#
| support | Support::None |
| Simulink path | — |
| port-count rule | PortsParam::None |
SampleTime parameter | yes |
Caveat (shown to the user): no Simulink equivalent as a signal block: its convolution layers exist only inside the Deep Learning blocks, which take a trained network OBJECT rather than a kernel. Discrete FIR Filter is not the same thing -- it filters along TIME, one sample in and one out, where this slides along a vector within one sample
Catalog contract: src/ICoreBlocks/ICoreCoder/ICoreCommandSystem/SimulinkBridge/ICoreSimulinkBlockCatalog.h
Description vs code#
The lists agree. check_block_descriptions.py finds no disagreement between the description's Ports, Parameters, Code export and Simulink bridge lists and the code's.
The verdict above is
tools/docs/check_block_descriptions.py(P7.1), which compares LISTS. It cannot read a sentence: "stateless" on a block with a state, an initial-value semantic the recursion does not implement, a "not synthesizable" caveat the HDL banner contradicts. That is the agent audit (P7.3) on BLOCK_DESCRIPTION_AUDIT.md, and this tool's green is not a substitute for one.
File banner (developer view)#
The top comment of the block's .cpp — the maths, the realization and the export strategy, addressed to whoever changes it. It must not contradict the description above (P7.5).
Conv 1D — MULTI-CHANNEL cross-correlation with stride, zero padding and dilation y[i][co] = b[co] + sum_ci sum_j w[n(co,ci)][j] * u[i*S + j*D - P][ci]
Input [L, Cin] -- one COLUMN per channel -- and output [Lout, Cout]. Cin is read off the signal, so nothing can be configured to disagree with it; Cout is
Output Channels.
Kernelis [Cout*Cin, K], row n = co*Cin + ci --layer.weight.reshape(-1, K)for a torch.nn.Conv1d, pasted in unrearranged. A [K,1] COLUMN is still accepted when Cout*Cin is 1: same K taps, the shipped default, and what a project saved before multi-channel loads as.
Channel Mode= Depthwise is the same walker with the cross-channel sum removed -- one kernel per input channel, PyTorch's groups = in_channels. Which (ci, j) pairs an output cell reads is decided ONCE, by the private taps(i, co) helper, and every one of the ten generators and compute_h() reads that list rather than recomputing the arithmetic.Fully UNROLLED at export time: L, Cin, Cout, K, S, P and D are all known once the model is built, and every tap that falls in the padding is resolved to a literal 0 and dropped from the emitted expression rather than guarded at run time. So no backend emits a loop bound, an index type or a bounds check, and PLC and the HDLs get the same straight-line code as C.
The three HDL targets are genuine Q16.16: this is multiply-accumulate and nothing else.
Sample results#
Plotted: vector — Sine Wave, [3,1]: amplitudes 1/2/3 at 2 rad/s (tried only because every scalar stimulus was refused)
Category dynamic · sample time 0.1 · 60 steps · commit c01902987 · produced by docsSample --out <folder> --steps 60 · data docs/generated/samples/Machine_Learning__Neural_Networks__Conv_1D.json · the SVG is generated from those numbers by tools/docs/plot_svg.py, so it is a run and not a drawing (R-D10).