Acsch — Control Systems/Trigonometry
Control_Systems/Trigonometry/Acsch · 1 input / 1 output port(s) at insert · exports to Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text
Description#
The block's own DESCRIPTION_HTML, rendered verbatim — the same text the config dialog's info panel and the library navigator show. Fix a wrong sentence in the block's .cpp (R-D9), never here.
Acsch
Control Systems / Trigonometry
Outputs the inverse hyperbolic cosecant of the input: y = acsch(u) = asinh(1 / u), applied entry by entry, so a matrix signal is transformed element for element.
Defined for every real input except u = 0, where 1/u is infinite.
Ports
- Input – the signal u, of any size [m,n], applied entry by entry.
- Output – the result y, of the SAME size [m,n]. The block never reshapes a signal.
Parameters
- Sampling Time (s) – zero or less inherits the solver's rate; a positive value runs the block at that period.
Code export
All ten targets: Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog and PLC Structured Text. There is nothing to tune, so nothing is exposed as a parameter on the generated core.
The seven software targets agree exactly, including out of domain, where they all produce IEEE NaN or ±Inf. Two of them lack this function entirely – Java and PLC Structured Text – and build it from logarithms; the other five call the library function, which is more accurate near zero than the logarithmic form.
The three HDL targets are simulation-only. There is no fixed-point
acsch in the Q16.16 datapath to call, so the generated cores convert at the port
boundary and evaluate in real arithmetic – correct in
simulation, but not offered as synthesizable. They carry neither NaN nor infinity, so out of domain they answer 0 where the software targets answer NaN or ±Inf, and PLC Structured Text answers 0 there too rather than dividing by zero at run time.
Simulink bridge
No Simulink equivalent, and the bridge says so rather than guessing. Simulink's Trigonometric Function offers thirteen real operators and this is not one of them – there is no acsch operator in the standard library. A model using this block reports it on export instead of being mapped to a different function. To cross the bridge, build the same value from blocks that do: a Math Function set to reciprocal, into a Trigonometric Function set to asinh.
Notes
- Algebraic, with no state: the output depends only on the current input.
- Not linear, so the block deliberately carries no state space and model reduction reports it as unmergeable.
- Odd, and it decays to 0 as |u| grows.
- No Simulink operator, so the block does not cross the bridge.
Code facts#
| Fact | Value |
|---|---|
| registered type | Control_Systems/Trigonometry/Acsch |
| family | Control_Systems/Trigonometry |
| solver environment class | ICoreBlock_0_Control_Systems_1_Trigonometry_2_Acsch |
| source | src/ICoreSDK/ICoreBlockLibrary/Blocks/Control_Systems/Trigonometry/Acsch/ICoreBlock_0_Control_Systems_1_Trigonometry_2_Acsch.cpp |
| header | src/ICoreSDK/ICoreBlockLibrary/Blocks/Control_Systems/Trigonometry/Acsch/ICoreBlock_0_Control_Systems_1_Trigonometry_2_Acsch.h |
| default size on canvas | 70 × 70 px |
| ports at insert | 1 in, 1 out |
| code generators implemented | Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text |
Ports#
| # | Direction | Signal type | Description label |
|---|---|---|---|
| 1 | in | ICoreDouble | — |
| 2 | out | ICoreDouble | — |
Ports the constructor creates. A block whose port list changes with its configuration adds or removes ports at load time; the count above is the one a freshly inserted block has.
Configuration variables#
No config variable beyond the Sampling Time (s) every block carries.
Every block also carries Sampling Time (s) from ICoreBlockSolverEnvironment: zero or less inherits the solver's rate, a positive value runs the block at that period.
Simulink bridge#
| support | Support::None |
| Simulink path | — |
| port-count rule | PortsParam::None |
SampleTime parameter | yes |
Caveat (shown to the user): Simulink's Trigonometric Function has no inverse hyperbolic cosecant operator; build it there as a Math Function set to reciprocal into asinh
Catalog contract: src/ICoreSDK/ICoreCoder/ICoreCommandSystem/SimulinkBridge/ICoreSimulinkBlockCatalog.h
Description vs code#
The lists agree. check_block_descriptions.py finds no disagreement between the description's Ports, Parameters, Code export and Simulink bridge lists and the code's.
The verdict above is
tools/docs/check_block_descriptions.py(P7.1), which compares LISTS. It cannot read a sentence: "stateless" on a block with a state, an initial-value semantic the recursion does not implement, a "not synthesizable" caveat the HDL banner contradicts. That is the agent audit (P7.3) on BLOCK_DESCRIPTION_AUDIT.md, and this tool's green is not a substitute for one.
File banner (developer view)#
The top comment of the block's .cpp — the maths, the realization and the export strategy, addressed to whoever changes it. It must not contradict the description above (P7.5).
Acsch -- y = acsch(u) = asinh(1 / u) One function, fixed: the inverse of the reciprocal form, y = acsch(u) = asinh(1 / u).
Algebraic and stateless. No state space -- see the header for why.
The argument is inverted first (1.0 / u) and the inverse function applied to that, in every one of the ten targets. Out of domain the seven software targets answer NaN or +/-Inf as the C++ reference does; the three HDLs and PLC ST answer 0.
Sample results#
7 sample(s) were non-finite (nan/inf) and are absent from the plot; they are in the table below and in the JSON.
| t | in ICoreDouble-Out-0 | out ICoreDouble-Out-0 |
|---|---|---|
| 0 | -2 | -0.4812 |
| 0.4 | 0.5 | 1.444 |
| 0.8 | -2 | -0.4812 |
| 1.2 | 0.5 | 1.444 |
| 1.6 | -2 | -0.4812 |
| 2 | 0.5 | 1.444 |
| 2.4 | -2 | -0.4812 |
| 2.8 | 0.5 | 1.444 |
| 3.2 | -2 | -0.4812 |
| 3.6 | 0.5 | 1.444 |
| 4 | -2 | -0.4812 |
| 4.4 | 0.5 | 1.444 |
| 4.8 | -2 | -0.4812 |
| 5.2 | 0.5 | 1.444 |
Every 4th of 60 samples, from the table stimulus.
The same rig also ran:
| Stimulus | What it is | Output range |
|---|---|---|
impulse | Impulse: one sample of 1 at k = 5, 0 elsewhere (Repeating Sequence Stair) | 0.8814 … 0.8814 |
ramp | Ramp: slope 1 from t = 0 | 0.1716 … 2.998 |
sine | Sine Wave: amplitude 1, 2 rad/s, no phase, no bias | -3.535 … 4.391 |
step | Step: 0 -> 1 at t = 1 s | 0.8814 … 0.8814 |
Plotted: table — Repeating Sequence Stair: [-2 -1 -0.5 0 0.5 1 2 3], one entry per sample
Category static · sample time 0.1 · 60 steps · commit ccf005c8 · produced by docsSample --out <folder> --steps 60 · data docs/generated/samples/Control_Systems__Trigonometry__Acsch.json · the SVG is generated from those numbers by tools/docs/plot_svg.py, so it is a run and not a drawing (R-D10).