To String — Control Systems/Strings
Control_Systems/Strings/To_String · 1 input / 1 output port(s) at insert · exports to Python, MATLAB, Java, Rust, C, C++
Description#
The block's own DESCRIPTION_HTML, rendered verbatim — the same text the config dialog's info panel and the library navigator show. Fix a wrong sentence in the block's .cpp (R-D9), never here.
To String
Control Systems / Strings
Writes the incoming number out as text: y = the text of u, in the
same form MATLAB's num2str gives for one number. A whole number is
written as the whole number (-7, 250000); anything
else with a few digits more than its integer part, and in scientific notation
when it is very small or very large (3.1416,
0.33333, -1234.5678, 1e-07,
1e+16).
Ports
- Input – the number u, one value [1,1]. A vector is refused, as it is in Simulink.
- Output – the text y (
str,ICoreString), one value.
Parameters
- Sampling Time (s) – zero or less inherits the solver's rate; a positive value runs the block at that period.
The rule, exactly
- A whole number smaller than 253 in size is written in full, with
no decimal point and no exponent. A negative zero is written
-0. - Any other number is written with P significant digits, where P is
four more than the number of digits before its decimal point, counted as at
least 1 and at most 12 – so 5 significant digits below 10, 9 at 12345.678,
16 at the most. Trailing zeros are dropped, and scientific notation is used
when the exponent is below −4 or at least P, with a two-digit exponent
(
1e-07,1.2346e-08). - Not-a-number is
NaN; infinity isInfor-Inf.
Code export
C, C++, Python, MATLAB, Java and Rust all write the same text for the same number. The first four use the C library's own formatting; Java and Rust have no equivalent of it, so their generated code rounds the value exactly to P digits and lays the digits out by the same rule.
VHDL, Verilog and SystemVerilog do not carry text, and PLC Structured Text is not supported either: the language has a string type, but the check that runs an exported core cannot read one back. An export to any of these four stops and names this block and the reason.
Simulink bridge
Import and export, mapped to simulink/String/To String, which has no parameters at all. The Simulink block has no sampling-time setting of its own, so a positive Sampling Time (s) stays on this side and is reported rather than written.
Simulink's block also accepts a Boolean (it writes true or
false) and integer types; this block takes a number, so convert a
Boolean first if that is the text you want. Integers need no conversion to
come out the same: a whole number is written in full either way.
Notes
- Algebraic, with no state: the output depends only on the current input.
- A value sitting exactly halfway between two P-digit roundings is rounded to the even one, as the C library does.
Code facts#
| Fact | Value |
|---|---|
| registered type | Control_Systems/Strings/To_String |
| family | Control_Systems/Strings |
| solver environment class | ICoreBlock_0_Control_Systems_1_Strings_2_To_String |
| source | src/ICoreBlocks/ICoreBlockLibrary/Blocks/Control_Systems/Strings/To_String/ICoreBlock_0_Control_Systems_1_Strings_2_To_String.cpp |
| header | src/ICoreBlocks/ICoreBlockLibrary/Blocks/Control_Systems/Strings/To_String/ICoreBlock_0_Control_Systems_1_Strings_2_To_String.h |
| default size on canvas | 90 × 60 px |
| ports at insert | 1 in, 1 out |
| code generators implemented | Python, MATLAB, Java, Rust, C, C++ |
Ports#
| # | Direction | Signal type | Description label |
|---|---|---|---|
| 1 | in | ICoreDouble | — |
| 2 | out | ICoreString | — |
Ports the constructor creates. A block whose port list changes with its configuration adds or removes ports at load time; the count above is the one a freshly inserted block has.
Configuration variables#
No config variable beyond the Sampling Time (s) every block carries.
Every block also carries Sampling Time (s) from ICoreBlockSolverEnvironment: zero or less inherits the solver's rate, a positive value runs the block at that period.
Simulink bridge#
| support | Support::Both |
| Simulink path | simulink/String/To String |
| port-count rule | PortsParam:: |
SampleTime parameter | no — the counterpart defines none; the rate stays on the ICore side |
Caveat (shown to the user): MEASURED on R2026a: the Simulink block has NO dialog parameters and no SampleTime, and writes num2str's text for a real scalar (3.14159 -> 3.1416, 1e-7 -> 1e-07, 1e16 -> 1e+16) except that a negative zero is
Catalog contract: src/ICoreBlocks/ICoreCoder/ICoreCommandSystem/SimulinkBridge/ICoreSimulinkBlockCatalog.h
Description vs code#
The lists agree. check_block_descriptions.py finds no disagreement between the description's Ports, Parameters, Code export and Simulink bridge lists and the code's.
The verdict above is
tools/docs/check_block_descriptions.py(P7.1), which compares LISTS. It cannot read a sentence: "stateless" on a block with a state, an initial-value semantic the recursion does not implement, a "not synthesizable" caveat the HDL banner contradicts. That is the agent audit (P7.3) on BLOCK_DESCRIPTION_AUDIT.md, and this tool's green is not a substitute for one.
File banner (developer view)#
The top comment of the block's .cpp — the maths, the realization and the export strategy, addressed to whoever changes it. It must not contradict the description above (P7.5).
To String -- a number in, its text out y = u written as text by MATLAB's num2str rule, which is what Simulink's To String block was measured to do on R2026a (every value in the header's list, plus 12345.678, 0.000123456, 9.99999 -> "10", 1e20 -> "1e+20"), with the one measured exception that a negative zero is "-0". The rule lives in ONE helper below for the live solve, and each of the six generators spells the same rule in its own language.
The output is a String signal, so the value leaves through the PORT rather than through compute_h's return, exactly as String Constant's does (D2).
Sample results#
This block carries a ICoreString signal, whose value is text rather than a number and is not something a plot has an axis for. The samples are in the table below, exactly as the run recorded them.
| t | in ICoreDouble-Out-0 | out ICoreString-Out-0 |
|---|---|---|
| 0 | -2 | -2 |
| 0.4 | 0.5 | 0.5 |
| 0.8 | -2 | -2 |
| 1.2 | 0.5 | 0.5 |
| 1.6 | -2 | -2 |
| 2 | 0.5 | 0.5 |
| 2.4 | -2 | -2 |
| 2.8 | 0.5 | 0.5 |
| 3.2 | -2 | -2 |
| 3.6 | 0.5 | 0.5 |
| 4 | -2 | -2 |
| 4.4 | 0.5 | 0.5 |
| 4.8 | -2 | -2 |
| 5.2 | 0.5 | 0.5 |
Every 4th of 60 samples, from the table stimulus.
The same rig also ran:
| Stimulus | What it is | Output range |
|---|---|---|
impulse | Impulse: one sample of 1 at k = 5, 0 elsewhere (Repeating Sequence Stair) | — |
ramp | Ramp: slope 1 from t = 0 | — |
sine | Sine Wave: amplitude 1, 2 rad/s, no phase, no bias | — |
step | Step: 0 -> 1 at t = 1 s | — |
Plotted: table — Repeating Sequence Stair: [-2 -1 -0.5 0 0.5 1 2 3], one entry per sample
Category static · sample time 0.1 · 60 steps · commit 6280f52f3 · produced by docsSample --out <folder> --blocks Rational_Resample,Three_Axis_Accelerometer,Three_Axis_Gyroscope,Three_Axis_Inertial_Measurement_Unit,Eclipse_Shadow_Model,To_String,String_To_ASCII,ASCII_To_String,Substring,String_Constant,String_Concatenate,String_Compare,String_Length --steps 60 · data docs/generated/samples/Control_Systems__Strings__To_String.json · the SVG is generated from those numbers by tools/docs/plot_svg.py, so it is a run and not a drawing (R-D10).