Data Store Memory — Control Systems/Signal Routing

Data Store Memory

Control Systems / Signal Routing

Declares a named data store: a matrix that Data Store Write blocks write and Data Store Read blocks read, by name, with no wire between them. The store holds Initial value until a Write replaces it, and keeps what was last written from one step to the next. Simulink’s Data Store Memory (BlockType=DataStoreMemory).

Ports

None.

Parameters

• Data store name – A (default). The name a Read or a Write gives to reach this store. Names are case-sensitive: Dx and dx are two stores. It is a name, never looked up in the variables space.
• Initial value – 0 (default); a scalar or a matrix, or a variable’s name. What a Read gives before any Write, at the start of every run.
• Dimensions – -1 (default) takes the store’s size from Initial value. A size, n (a 1×n row) or [r c], expands a scalar initial value to that size; a matrix initial value must already have it.
• Read before write – none (default), warning or error: what a run reports when a Read, in a step, reads the store before any Write has written it in that step – which includes every Read of a store nothing writes.
• Write after write – warning (default), none or error: a Write, in a step, after another Write has already written the store in that step.
• Write after read – none (default), warning or error: a Write, in a step, after a Read has read the store in that step.
• Sampling Time (s) – zero or less inherits the solver’s rate; a positive value runs the block at that period. The block computes nothing, so its rate changes no value, and Simulink’s Data Store Memory has no SampleTime: it does not cross the bridge.

Each of the three is reported once per run, in Simulink’s words and with its message ID; error stops the run.

Scope

• A store is visible at the level its Memory sits in and in every subsystem below it, never above it or in a sibling. A Read or a Write that finds none stops the run: Data store memory with name 'A' was not found for block …, as Simulink says it.
• A Memory inside a subsystem shadows one of the same name further out, for the blocks at its level and below. Two Memories with one name at the same level stop the run.

Code export

All ten targets: the store is a named global of the exported core (ds0, ds1, …), held beside the signals and seeded with the initial value where the target seeds its state; Python, MATLAB, Java, Rust, C and C++ hold it in doubles, VHDL, Verilog and SystemVerilog in their Q16.16 fixed point, and PLC Structured Text in LREAL. The block itself emits no statement. An export of a subsystem whose Reads or Writes reach a store declared outside it is refused by name, because the core would have nowhere to hold the store. The three diagnostics are the simulation’s; an exported core does not report them.

Simulink bridge

Both directions, as simulink/Signal Routing/Data Store Memory. Data store name goes to DataStoreName, Initial value to InitialValue, Dimensions to Dimensions, and the three diagnostics to ReadBeforeWriteMsg, WriteAfterWriteMsg and WriteAfterReadMsg, one value for one value. Simulink’s block has no SampleTime, so none is written. Its data type (OutDataTypeStr), signal type, storage class and logging settings do not cross: a store here is double.

Notes

• A store written in one step is read by a Read later in the same step: a Write is ordered before the Reads of its store wherever no data path or loop says otherwise, as Simulink orders them. A data path from a Read to a Write of the same store wins, so Read → +1 → Write counts 0, 1, 2, … with no delay block.
• Simulink’s block Priority, which reverses that order, has no counterpart here; an import names each block that carries one.
• A global store backed by a workspace Simulink.Signal is not supported.