Generated reference › Sequence Viewer — Control Systems/Messages And Events
kind: generated#block#control-systems-messages-and-events

Sequence Viewer — Control Systems/Messages And Events

Control_Systems/Messages_And_Events/Sequence_Viewer · 0 input / 0 output port(s) at insert · exports to Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text

Description#

The block's own DESCRIPTION_HTML, rendered verbatim — the same text the config dialog's info panel and the library navigator show. Fix a wrong sentence in the block's .cpp (R-D9), never here.

Sequence Viewer

Control Systems / Messages And Events

Shows the messages a run sent as a sequence diagram: a lifeline for each block that sent or read a message, time running down, and an arrow for each message from its sender at the time it was sent to its reader at the time it was taken – level when it was taken in the step it was sent, slanting when it waited, an open head when no one took it, and a cross where a full queue refused one. Each arrow carries the message’s value and the time it was sent. It shows the messages of the level it sits in and the levels below it: a viewer in a subsystem shows that subsystem’s traffic, one at the top the whole model’s. Double-click it to open the diagram of the last run; its Refresh reads the run again. It changes nothing in the run.

Ports

  • None: it is not wired; it watches the message lines around it.

Parameters

  • History – how many events it shows, the last ones: each message sent, taken or dropped is one. A whole number of at least 1. Default 1000.
  • Variable Step Time Precision – how many decimals the send times on the arrows are given to. A whole number, 0 or more. Default 3.
  • Sampling Time (s) – not read: a viewer runs nothing.

Code export

All ten targets: Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog and PLC Structured Text, as a named body that does nothing: a viewer computes nothing.

Simulink bridge

Import and export, mapped to simulink/Messages & Events/Sequence Viewer. History ↔ History and Variable Step Time Precision ↔ VariableStepTimePrecision. "Sampling Time (s)" does not cross: Simulink’s Sequence Viewer has no SampleTime parameter.

Notes

  • Stateless: what it shows is the run’s message log, which every run starts empty.
  • Measured on R2026a: the block has no ports and two parameters, History 1000 and VariableStepTimePrecision 3; History 0 and a precision of −1 are refused, as here; it keeps nothing a script can read; what certifies the traffic it shows is the logged message line, which ICore’s log equals.

Code facts#

FactValue
registered typeControl_Systems/Messages_And_Events/Sequence_Viewer
familyControl_Systems/Messages_And_Events
solver environment classICoreBlock_0_Control_Systems_1_Messages_And_Events_2_Sequence_Viewer
sourcesrc/ICoreBlocks/ICoreBlockLibrary/Blocks/Control_Systems/Messages_And_Events/Sequence_Viewer/ICoreBlock_0_Control_Systems_1_Messages_And_Events_2_Sequence_Viewer.cpp
headersrc/ICoreBlocks/ICoreBlockLibrary/Blocks/Control_Systems/Messages_And_Events/Sequence_Viewer/ICoreBlock_0_Control_Systems_1_Messages_And_Events_2_Sequence_Viewer.h
default size on canvas70 × 70 px
ports at insert0 in, 0 out
code generators implementedPython, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text

Ports#

The constructor creates no port explicitly — the port list comes from registerInitialPorts (0 in, 0 out) or from the block's configuration.

Configuration variables#

Config variableDefaultSimulink parameter
History1000History
Variable Step Time Precision3VariableStepTimePrecision

Every block also carries Sampling Time (s) from ICoreBlockSolverEnvironment: zero or less inherits the solver's rate, a positive value runs the block at that period.

supportSupport::Both
Simulink pathsimulink/Messages\n& Events/Sequence Viewer
port-count rulePortsParam::None
SampleTime parameterno — the counterpart defines none; the rate stays on the ICore side
ICore configSimulink parameterValue translation
HistoryHistorypasses through
Variable Step Time PrecisionVariableStepTimePrecisionpasses through

Caveat (shown to the user): Simulink's Sequence Viewer has no SampleTime: it computes nothing.

Catalog contract: src/ICoreBlocks/ICoreCoder/ICoreCommandSystem/SimulinkBridge/ICoreSimulinkBlockCatalog.h

Description vs code#

The checker has a blind spot here — it could not resolve something (a grouped port bullet, a computed config name), which is reported and never counted as a pass. A reader has to settle it:

  • B0 no sample under docs/generated/samples/ — nothing to cross-check (P8.1)

The verdict above is tools/docs/check_block_descriptions.py (P7.1), which compares LISTS. It cannot read a sentence: "stateless" on a block with a state, an initial-value semantic the recursion does not implement, a "not synthesizable" caveat the HDL banner contradicts. That is the agent audit (P7.3) on BLOCK_DESCRIPTION_AUDIT.md, and this tool's green is not a substitute for one.

Sample results#

No sample run is committed for this block. Samples come from the headless harness (DOCS_PLAN.md P8.1) into docs/generated/samples/; until one exists this block's behaviour is witnessed by the parity and export-verification suites, not by a plot here.