Queue — Control Systems/Messages And Events
Control_Systems/Messages_And_Events/Queue · 1 input / 1 output port(s) at insert · exports to Python, MATLAB, Java, Rust, C, C++
Description#
The block's own DESCRIPTION_HTML, rendered verbatim — the same text the config dialog's info panel and the library navigator show. Fix a wrong sentence in the block's .cpp (R-D9), never here.
Queue
Control Systems / Messages And Events
Holds messages: every message that arrives on its input waits here, up to the Capacity, until the block that reads its output takes it. A reader that keeps one message – a Receive without its internal queue, a message-polled subsystem – takes one on each of its hits, the newest (LIFO) or the oldest (FIFO); a reader that keeps more – a Receive with its internal queue, a message-triggered subsystem, a Message Merge, another Queue – takes every message as it arrives, oldest first, so this block's order does not show. So a slow Receive reads a backlog in order instead of only the newest message.
Ports
- Input msg – a message line, from a Send or another block that sends messages; its messages are any size [m,n].
- Output #n – only with Overwrite oldest Off and Number of entities in block On, and then the first output, as in Simulink: how many messages wait here when the block runs, after the ones arriving and before the reader takes one.
- Output msg – the message line to the block that reads it, which it must feed directly: not across a subsystem boundary, except into a message-driven subsystem’s trigger. The second output when the count is shown.
Parameters
- Capacity – how many messages it holds, a whole number of at least 1. Default 16.
- Queue type – which message a reader that keeps one takes first:
- LIFO (default) – the newest.
- FIFO – the oldest.
- Priority – refused: it orders messages by a field of a bus message, and these messages carry a matrix.
- Overwrite oldest – On (default): a message arriving at a full queue drops the oldest. Off: it is dropped itself, and the run reports how many were dropped, as R2026a warns.
- Number of entities in block – Off (default) or On: with Overwrite oldest Off, On shows the count output. The output count must agree: add or remove the port to match, or the run is refused with the block’s name.
- Sampling Time (s) – zero or less (default) inherits its sender’s rate, so it takes each message as it is sent; a positive value runs it at that period, and messages wait on the line between its hits.
Code export
Python, MATLAB, Java, Rust, C and C++: each message line is one fixed-capacity queue in the generated core, held beside the signals. The line into this block keeps its capacity and overflow rule; each call moves messages on to the line it feeds – one, by its order, when that line’s reader keeps one message and holds none, or all of them otherwise – and writes the count, as live.
VHDL, Verilog, SystemVerilog and PLC Structured Text refuse a message line by name: a hardware queue is left until a hardware design asks for one. A message line that crosses the boundary of the subsystem being exported is refused by every target.
Simulink bridge
Import and export, mapped to simulink/Messages & Events/Queue.
Capacity ↔ Capacity, Queue type ↔
QueueType (one value for one value), Overwrite oldest ↔
OverwriteOldest and Number of entities in block ↔
NumberEntitiesInBlock (Off/On ↔ off/on). Simulink moves the count port
itself. Its SimEvents settings (actions, statistics other than the count, multicast
arrival) have no ICore counterpart. "Sampling Time (s)" does not cross:
Simulink’s Queue has no SampleTime parameter and runs when messages arrive;
a rate set here stays on the ICore side and is reported.
Notes
- The messages may be a bus (a Hit Crossing Probe’s): they pass through as they came, and the Receive after it outputs the bus.
- Stateful: it keeps the messages waiting.
- Measured on R2026a: a Send every 0.25 s through a Queue into a Receive every 1 s reads 100, 100.25, 100.5, 100.75 (FIFO), 100, 101, 102, 103 (LIFO), 100, 100.75, 101.75, 102.75 (FIFO, capacity 2), and 100, 100.25, 100.5, 101.25 (FIFO, capacity 2, overwrite off). Its count reads 1, 4, 7, 10 at 0, 1, 2 and 3 s; R2026a logs it as an event trace, and these are its first value at each time. Behind a Receive with an internal FIFO queue of 3 it reads 100, 100.5, 101.5, 102.5 whether FIFO or LIFO.
Code facts#
| Fact | Value |
|---|---|
| registered type | Control_Systems/Messages_And_Events/Queue |
| family | Control_Systems/Messages_And_Events |
| solver environment class | ICoreBlock_0_Control_Systems_1_Messages_And_Events_2_Queue |
| source | src/ICoreBlocks/ICoreBlockLibrary/Blocks/Control_Systems/Messages_And_Events/Queue/ICoreBlock_0_Control_Systems_1_Messages_And_Events_2_Queue.cpp |
| header | src/ICoreBlocks/ICoreBlockLibrary/Blocks/Control_Systems/Messages_And_Events/Queue/ICoreBlock_0_Control_Systems_1_Messages_And_Events_2_Queue.h |
| default size on canvas | 70 × 60 px |
| ports at insert | 1 in, 1 out |
| code generators implemented | Python, MATLAB, Java, Rust, C, C++ |
Ports#
| # | Direction | Signal type | Description label |
|---|---|---|---|
| 1 | in | ICoreMessage | msg |
| 2 | out | ICoreMessage | msg |
Ports the constructor creates. A block whose port list changes with its configuration adds or removes ports at load time; the count above is the one a freshly inserted block has.
Configuration variables#
| Config variable | Default | Simulink parameter |
|---|---|---|
Capacity | 16 | Capacity |
Queue type | FIFO%~%LIFO%~%Priority~~LIFO | QueueType |
Overwrite oldest | Off%~%On~~On | OverwriteOldest |
Number of entities in block | Off%~%On~~Off | NumberEntitiesInBlock |
Every block also carries Sampling Time (s) from ICoreBlockSolverEnvironment: zero or less inherits the solver's rate, a positive value runs the block at that period.
Simulink bridge#
| support | Support::Both |
| Simulink path | simulink/Messages\n& Events/Queue |
| port-count rule | PortsParam::QueueCountPort |
SampleTime parameter | no — the counterpart defines none; the rate stays on the ICore side |
| deliberately not crossed | PrioritySource, SortingDirection, EntityArrivalSource, MulticastTag, EntryAction, ExitAction, BlockedAction, NumberEntitiesDeparted, NumEntitiesExtracted, AverageWait, AverageQueueLength |
| ICore config | Simulink parameter | Value translation |
|---|---|---|
Capacity | Capacity | passes through |
Queue type | QueueType | FIFO → FIFO, LIFO → LIFO, Priority → Priority |
Overwrite oldest | OverwriteOldest | Off → off, On → on |
Number of entities in block | NumberEntitiesInBlock | Off → off, On → on |
Caveat (shown to the user): Simulink's Queue has no SampleTime: it runs when messages arrive. Its SimEvents settings have no ICore counterpart.
Catalog contract: src/ICoreBlocks/ICoreCoder/ICoreCommandSystem/SimulinkBridge/ICoreSimulinkBlockCatalog.h
Description vs code#
The checker has a blind spot here — it could not resolve something (a grouped port bullet, a computed config name), which is reported and never counted as a pass. A reader has to settle it:
B0Ports lists 3 entries for 2 ports (1 in, 1 out), and the 3 they cover does not reconcile — grouped, or one undocumented? a reader must sayB0no sample under docs/generated/samples/ — nothing to cross-check (P8.1)
The verdict above is
tools/docs/check_block_descriptions.py(P7.1), which compares LISTS. It cannot read a sentence: "stateless" on a block with a state, an initial-value semantic the recursion does not implement, a "not synthesizable" caveat the HDL banner contradicts. That is the agent audit (P7.3) on BLOCK_DESCRIPTION_AUDIT.md, and this tool's green is not a substitute for one.
Sample results#
No sample run is committed for this block. Samples come from the headless harness (DOCS_PLAN.md P8.1) into docs/generated/samples/; until one exists this block's behaviour is witnessed by the parity and export-verification suites, not by a plot here.