Fit Integral — Control Systems/Curve Fitting
Control_Systems/Curve_Fitting/Fit_Integral · 1 input / 1 output port(s) at insert · exports to Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text
Description#
The block's own DESCRIPTION_HTML, rendered verbatim — the same text the config dialog's info panel and the library navigator show. Fix a wrong sentence in the block's .cpp (R-D9), never here.
Fit Integral
Control Systems / Curve Fitting
Integrates a polynomial given by its coefficients. With the input in
descending powers,
c₀·xL−1 + … + cL−1,
the output is
(c₀/L)·xL + … +
(cL−1/1)·x + K – entry r is
cr/(L−r), and the last entry is the integration constant.
This is MATLAB's polyint.
It transforms a curve, not a sample. Wire Curve Fitting / Polynomial Fit into it to integrate a running fit, and Curve Fitting / Evaluate Fit after it to read the area somewhere: the definite integral from a to b is the curve at b minus the curve at a.
Ports
- c – the coefficients, descending powers, as a vector of L entries: a column [L,1] or a row [1,L]. A scalar is a constant polynomial, whose integral is a straight line.
- ic – the antiderivative's coefficients, descending, with L+1 entries and the same orientation as the input.
Parameters
- Integration Constant – K, a single number, written
straight into the output's last entry. It is the value the antiderivative takes
at x = 0, and it is a parameter rather than a port because it says where the
area is measured FROM – a property of the question, not of the signal.
Default 0, which is
polyint(c)'s own default. - Sampling Time (s) – zero or less inherits the solver's rate; a positive value runs the block at that period.
Code export
All ten targets: Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog and PLC Structured Text.
Integration Constant is structural and is inlined at export time rather than exposed as a tunable parameter, alongside the divisors. Both follow from settings that also decide the shape of the emitted body, so re-export after changing them.
The three HDL targets are genuine synthesizable Q16.16: the divisors are constants decided by the input's length, so each one is inlined as its reciprocal and multiplied. There is no divider in any generated core.
Simulink bridge
None (Support::None). polyint is a MATLAB
function, and the Curve Fitting Toolbox ships no Simulink library at all, so
there is no library path a diagram could name. The bridge reports this block
rather than dropping it silently, and it therefore has no parity
testbench; code export verification still covers it across all ten
languages. No configuration of it crosses either, including "Sampling Time (s)",
which has no counterpart to be written to.
Notes
- Algebraic, with no state: the output depends only on the current input.
- This is not an integrator, and K is not an initial condition. Nothing accumulates: the output at every sample is the antiderivative of the coefficients arriving at that sample, with no memory of the last one. For a running integral of a signal reach for Integrator or Discrete-Time Integrator.
- The units are the fitting axis's. Polynomial Fit writes its curve on x = −i·h, so an area under this curve is in signal units times that h: per sample at h = 1, per second when h is the sampling period.
- Verified against MATLAB. For the coefficients
[0.18018728956228861 0.97582972582972149 0.99028980278979795
−0.12171717171717268] this block reproduces
polyint(c, 0)entry for entry in R2026a. - No state space: the map changes the signal's HEIGHT, which a merged feed-through D cannot do, and it is affine rather than linear whenever K is nonzero. Model reduction correctly declines to merge it.
Code facts#
| Fact | Value |
|---|---|
| registered type | Control_Systems/Curve_Fitting/Fit_Integral |
| family | Control_Systems/Curve_Fitting |
| solver environment class | ICoreBlock_0_Control_Systems_1_Curve_Fitting_2_Fit_Integral |
| source | src/ICoreBlocks/ICoreBlockLibrary/Blocks/Control_Systems/Curve_Fitting/Fit_Integral/ICoreBlock_0_Control_Systems_1_Curve_Fitting_2_Fit_Integral.cpp |
| header | src/ICoreBlocks/ICoreBlockLibrary/Blocks/Control_Systems/Curve_Fitting/Fit_Integral/ICoreBlock_0_Control_Systems_1_Curve_Fitting_2_Fit_Integral.h |
| default size on canvas | 110 × 70 px |
| ports at insert | 1 in, 1 out |
| code generators implemented | Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text |
Ports#
| # | Direction | Signal type | Description label |
|---|---|---|---|
| 1 | in | ICoreDouble | c |
| 2 | out | ICoreDouble | ic |
Ports the constructor creates. A block whose port list changes with its configuration adds or removes ports at load time; the count above is the one a freshly inserted block has.
Configuration variables#
| Config variable | Default | Simulink parameter |
|---|---|---|
Integration Constant | 0 | — |
Every block also carries Sampling Time (s) from ICoreBlockSolverEnvironment: zero or less inherits the solver's rate, a positive value runs the block at that period.
Simulink bridge#
| support | Support::None |
| Simulink path | — |
| port-count rule | PortsParam::None |
SampleTime parameter | yes |
Caveat (shown to the user): integrating a polynomial by its coefficients is a MATLAB function (polyint), not a Simulink library block -- the Curve Fitting Toolbox ships no Simulink library at all -- so there is no path a diagram could name; the block is reported rather than dropped when a model crosses
Catalog contract: src/ICoreBlocks/ICoreCoder/ICoreCommandSystem/SimulinkBridge/ICoreSimulinkBlockCatalog.h
Description vs code#
The checker has a blind spot here — it could not resolve something (a grouped port bullet, a computed config name), which is reported and never counted as a pass. A reader has to settle it:
B0no sample under docs/generated/samples/ — nothing to cross-check (P8.1)
The verdict above is
tools/docs/check_block_descriptions.py(P7.1), which compares LISTS. It cannot read a sentence: "stateless" on a block with a state, an initial-value semantic the recursion does not implement, a "not synthesizable" caveat the HDL banner contradicts. That is the agent audit (P7.3) on BLOCK_DESCRIPTION_AUDIT.md, and this tool's green is not a substitute for one.
File banner (developer view)#
The top comment of the block's .cpp — the maths, the realization and the export strategy, addressed to whoever changes it. It must not contradict the description above (P7.5).
Fit Integral -- polyint on a wire Entry r of the output is c_r / (L-r) for r < L, and the last entry is the integration constant K. c is DESCENDING powers and L is the input's length.
Verified against R2026a: polyint([0.18018728956228861 0.97582972582972149 0.99028980278979795 -0.12171717171717268], 0) reports [0.045046822390572151 0.32527657527657383 0.49514490139489897 -0.12171717171717268 0], which is c0/4, c1/3, c2/2, c3/1, K.
The four divisors are CONSTANTS decided by the input's length, so every target inlines their RECIPROCALS and multiplies -- there is no divider in any generated core, which is what lets the three hardware targets carry the block in genuine Q16.16.
Sample results#
No sample run is committed for this block. Samples come from the headless harness (DOCS_PLAN.md P8.1) into docs/generated/samples/; until one exists this block's behaviour is witnessed by the parity and export-verification suites, not by a plot here.