Reciprocal Sqrt — Control Systems/Base Blocks
Control_Systems/Base_Blocks/Reciprocal_Sqrt · 1 input / 1 output port(s) at insert · exports to Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text
Description#
The block's own DESCRIPTION_HTML, rendered verbatim — the same text the config dialog's info panel and the library navigator show. Fix a wrong sentence in the block's .cpp (R-D9), never here.
Reciprocal Sqrt
Control Systems / Base Blocks
Takes one over the square root of the input, entry by entry: y = 1/√u. It is the normalizing factor that turns a squared magnitude into a unit scale in one block instead of a Sqrt and a Divide.
Ports
- Input – the signal u, of any size [m,n]. Defined for u > 0 only: an entry of exactly zero yields +Inf and a negative entry yields NaN.
- Output – the reciprocal root y, of the SAME size [m,n]. The block never reshapes a signal.
Parameters
- Sampling Time (s) – zero or less inherits the solver's rate; a positive value runs the block at that period.
Code export
All ten targets: Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog and PLC Structured Text. There is nothing to expose as a tunable parameter: the operation is the block, so it is emitted straight into the arithmetic.
The seven software targets agree exactly, including out of domain, where they
all produce IEEE NaN or +Inf. MATLAB needs one extra step to get there: its
sqrt of a negative real returns a complex number rather than
NaN, so the generated MATLAB maps negative entries to NaN first and keeps the
result real.
The three HDL targets are simulation-only. There is no square root in
the Q16.16 datapath to call, so the generated cores convert at the port boundary
and evaluate the root in real arithmetic – correct in
simulation, but not offered as synthesizable. They also carry neither NaN nor
infinity, so out of domain they answer 0 where the software targets answer
NaN or +Inf. Keep the input strictly positive if the exported core has to agree
with the reference everywhere.
Simulink bridge
Import and export, mapped to simulink/Math Operations/Reciprocal
Sqrt. That library entry is Simulink's Sqrt block pre-set to
Operator = rSqrt, so the entry writes that Operator as
a fixed parameter – it has no ICore config behind it, because this block
offers no choice of operator. An imported block whose Operator says
anything else is reported rather than silently accepted. "Sampling Time (s)" maps
to SampleTime, as on every block.
Simulink's AlgorithmType (Exact or
Newton-Raphson) and its Iterations count do not cross.
They select a fixed-point approximation of the reciprocal root; ICore computes
the exact double, which is what Simulink's own default of Exact does
too.
Notes
- Algebraic, with no state: the output depends only on the current input.
- Not linear, so the block deliberately carries no state space and model reduction reports it as unmergeable.
- ICore's Sqrt block offers this same operator alongside the plain and signed roots. Use that one to switch between them on a single block; use this one when the operation is fixed, and to round-trip Simulink's own Reciprocal Sqrt library entry.
Code facts#
| Fact | Value |
|---|---|
| registered type | Control_Systems/Base_Blocks/Reciprocal_Sqrt |
| family | Control_Systems/Base_Blocks |
| solver environment class | ICoreBlock_0_Control_Systems_1_Base_Blocks_2_Reciprocal_Sqrt |
| source | src/ICoreSDK/ICoreBlockLibrary/Blocks/Control_Systems/Base_Blocks/Reciprocal_Sqrt/ICoreBlock_0_Control_Systems_1_Base_Blocks_2_Reciprocal_Sqrt.cpp |
| header | src/ICoreSDK/ICoreBlockLibrary/Blocks/Control_Systems/Base_Blocks/Reciprocal_Sqrt/ICoreBlock_0_Control_Systems_1_Base_Blocks_2_Reciprocal_Sqrt.h |
| default size on canvas | 70 × 70 px |
| ports at insert | 1 in, 1 out |
| code generators implemented | Python, MATLAB, Java, Rust, C, C++, VHDL, Verilog, SystemVerilog, PLC Structured Text |
Ports#
| # | Direction | Signal type | Description label |
|---|---|---|---|
| 1 | in | ICoreDouble | — |
| 2 | out | ICoreDouble | — |
Ports the constructor creates. A block whose port list changes with its configuration adds or removes ports at load time; the count above is the one a freshly inserted block has.
Configuration variables#
No config variable beyond the Sampling Time (s) every block carries.
Every block also carries Sampling Time (s) from ICoreBlockSolverEnvironment: zero or less inherits the solver's rate, a positive value runs the block at that period.
Simulink bridge#
| support | Support::Both |
| Simulink path | simulink/Math Operations/Reciprocal Sqrt |
| port-count rule | PortsParam::None |
SampleTime parameter | yes |
| always set | Operator = rSqrt |
Caveat (shown to the user): Simulink's AlgorithmType (Exact / Newton-Raphson) and Iterations do not cross: they select a fixed-point approximation, and ICore computes the exact double -- which is what Simulink's own default of Exact does
Catalog contract: src/ICoreSDK/ICoreCoder/ICoreCommandSystem/SimulinkBridge/ICoreSimulinkBlockCatalog.h
Description vs code#
The lists agree. check_block_descriptions.py finds no disagreement between the description's Ports, Parameters, Code export and Simulink bridge lists and the code's.
The verdict above is
tools/docs/check_block_descriptions.py(P7.1), which compares LISTS. It cannot read a sentence: "stateless" on a block with a state, an initial-value semantic the recursion does not implement, a "not synthesizable" caveat the HDL banner contradicts. That is the agent audit (P7.3) on BLOCK_DESCRIPTION_AUDIT.md, and this tool's green is not a substitute for one.
File banner (developer view)#
The top comment of the block's .cpp — the maths, the realization and the export strategy, addressed to whoever changes it. It must not contradict the description above (P7.5).
Reciprocal Sqrt block -- one over the square root y = 1 / sqrt(u), entry by entry. Algebraic and stateless, no state space (neither the root nor the reciprocal is linear).
OUT OF DOMAIN. The block is defined for u > 0 only. The seven software targets all produce the IEEE answers and agree exactly -- +Inf at zero, NaN below it -- except MATLAB, whose sqrt() of a negative real returns a COMPLEX number rather than NaN, so the MATLAB body maps the negative entries to NaN first and keeps the result real, matching the other six.
HDL. Q16.16 carries neither NaN nor infinity, so the three HDL backends answer 0 there instead. They are also SIMULATION-ONLY: there is no fixed-point square root to call, so they convert at the port boundary and evaluate in
real.RELATIONSHIP TO THE Sqrt BLOCK. Simulink's Reciprocal Sqrt is its Sqrt block pre-set to Operator = rSqrt, and ICore's Sqrt offers that operator too, so the arithmetic here is deliberately identical to that block's ReciprocalSqrt branch. What this block adds is the BRIDGE IDENTITY: it maps to simulink/Math Operations/Reciprocal Sqrt, so a model containing that library entry imports as the same block it left as, instead of collapsing into a general Sqrt whose Operator a later edit could silently change.
Sample results#
32 sample(s) were non-finite (nan/inf) and are absent from the plot; they are in the table below and in the JSON.
| t | in ICoreDouble-Out-0 | out ICoreDouble-Out-0 |
|---|---|---|
| 0 | -2 | nan |
| 0.4 | 0.5 | 1.414 |
| 0.8 | -2 | nan |
| 1.2 | 0.5 | 1.414 |
| 1.6 | -2 | nan |
| 2 | 0.5 | 1.414 |
| 2.4 | -2 | nan |
| 2.8 | 0.5 | 1.414 |
| 3.2 | -2 | nan |
| 3.6 | 0.5 | 1.414 |
| 4 | -2 | nan |
| 4.4 | 0.5 | 1.414 |
| 4.8 | -2 | nan |
| 5.2 | 0.5 | 1.414 |
Every 4th of 60 samples, from the table stimulus.
The same rig also ran:
| Stimulus | What it is | Output range |
|---|---|---|
impulse | Impulse: one sample of 1 at k = 5, 0 elsewhere (Repeating Sequence Stair) | 1 … 1 |
ramp | Ramp: slope 1 from t = 0 | 0.4152 … 3.162 |
sine | Sine Wave: amplitude 1, 2 rad/s, no phase, no bias | 1 … 6.353 |
step | Step: 0 -> 1 at t = 1 s | 1 … 1 |
Plotted: table — Repeating Sequence Stair: [-2 -1 -0.5 0 0.5 1 2 3], one entry per sample
Category static · sample time 0.1 · 60 steps · commit ccf005c8 · produced by docsSample --out <folder> --steps 60 · data docs/generated/samples/Control_Systems__Base_Blocks__Reciprocal_Sqrt.json · the SVG is generated from those numbers by tools/docs/plot_svg.py, so it is a run and not a drawing (R-D10).